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Commit 9bc35499 authored by Adam Jackson's avatar Adam Jackson Committed by Eric Anholt
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drm/i915: Honor sync polarity from VBT panel timing descriptors 



I'm actually kind of shocked that it works at all otherwise.

Signed-off-by: default avatarAdam Jackson <ajax@redhat.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
parent a1786bd2

drivers/gpu/drm/i915/intel_bios.c

+10 −0
Original line number Original line Diff line number Diff line
@@ -95,6 +95,16 @@ fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode, 
	panel_fixed_mode->clock = dvo_timing->clock * 10;

	panel_fixed_mode->clock = dvo_timing->clock * 10;

	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;

	panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;





	if (dvo_timing->hsync_positive)

		panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;

	else

		panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;



	if (dvo_timing->vsync_positive)

		panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;

	else

		panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;



	/* Some VBTs have bogus h/vtotal values */

	/* Some VBTs have bogus h/vtotal values */

	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)

	if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)

		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;

		panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;