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Commit 9ae73f6b authored by Jeevan Shriram's avatar Jeevan Shriram
Browse files

msm: mdss: restore ctl registers when idle power collapse is enabled 



In the current implementation, control register are not being restored
for the compression modes. This causes display corruption on command
mode panels if idle power collapse is enabled. This change restores the
compression mode registers while coming out of idle power collapse.

CRs-Fixed: 859333
Change-Id: Id40270e78b798f3baf7a6c3ad2598f7f12bbf3fb
Signed-off-by: default avatarJeevan Shriram <jshriram@codeaurora.org>
parent 37bc52a5

drivers/video/msm/mdss/mdss_mdp_ctl.c

+23 −3
Original line number Diff line number Diff line
@@ -3017,13 +3017,33 @@ int mdss_mdp_ctl_intf_event(struct mdss_mdp_ctl *ctl, int event, void *arg) 
static void mdss_mdp_ctl_restore_sub(struct mdss_mdp_ctl *ctl)

{

	u32 temp;

	int ret = 0;



	temp = readl_relaxed(ctl->mdata->mdp_base +

			MDSS_MDP_REG_DISP_INTF_SEL);

	temp |= (ctl->intf_type << ((ctl->intf_num - MDSS_MDP_INTF0) * 8));

	writel_relaxed(temp, ctl->mdata->mdp_base +

			MDSS_MDP_REG_DISP_INTF_SEL);



	if (ctl->mixer_left) {

		mdss_mdp_pp_resume(ctl, ctl->mixer_left->num);

		if (ctl->mixer_right)

			mdss_mdp_pp_resume(ctl, ctl->mixer_right->num);



		if (ctl->panel_data->panel_info.compression_mode ==

				COMPRESSION_DSC) {

			ret = mdss_mdp_ctl_dsc_enable(1, ctl->mixer_left,

					&ctl->panel_data->panel_info);

			if (ret)

				pr_err("Failed to restore DSC mode\n");

		} else if (ctl->panel_data->panel_info.compression_mode ==

				COMPRESSION_FBC) {

			ret = mdss_mdp_ctl_fbc_enable(1, ctl->mixer_left,

					&ctl->panel_data->panel_info);

			if (ret)

				pr_err("Failed to restore FBC mode\n");

		}

	}

}



/*