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Commit 9ad12bdf authored by Veera Sundaram Sankaran's avatar Veera Sundaram Sankaran
Browse files

msm: mdss: fix border configurations for split DSI cases 



Previously, all split dsi panels had two panel files and border-right
of DSI0 and border-left of DSI1 was set to 0 and all the kernel
calculations were based on that assumption. Replicate the same
scenario with the new single file panel configs by changing the border
values accordingly while setting the values for each DSI. And, include
the border configs during pipe configuration.

Change-Id: If7f5ed4d71ddc2ca26a8be34566df768b1ed7a13
Signed-off-by: default avatarVeera Sundaram Sankaran <veeras@codeaurora.org>
parent 7f8441ae

drivers/video/msm/mdss/mdss_dsi_panel.c

+13 −0
Original line number Diff line number Diff line
@@ -2108,6 +2108,10 @@ static int mdss_dsi_panel_timing_from_dt(struct device_node *np, 
	u32 tmp;

	int rc, i, len;

	const char *data;

	struct mdss_dsi_ctrl_pdata *ctrl_pdata;



	ctrl_pdata = container_of(panel_data, struct mdss_dsi_ctrl_pdata,

				panel_data);



	rc = of_property_read_u32(np, "qcom,mdss-dsi-panel-width", &tmp);

	if (rc) {
@@ -2144,6 +2148,15 @@ static int mdss_dsi_panel_timing_from_dt(struct device_node *np, 
	pt->timing.border_left = !rc ? tmp : 0;

	rc = of_property_read_u32(np, "qcom,mdss-dsi-h-right-border", &tmp);

	pt->timing.border_right = !rc ? tmp : 0;



	/* overriding left/right borders for split display cases */

	if (mdss_dsi_is_hw_config_split(ctrl_pdata->shared_data)) {

		if (panel_data->next)

			pt->timing.border_right = 0;

		else

			pt->timing.border_left = 0;

	}



	rc = of_property_read_u32(np, "qcom,mdss-dsi-v-top-border", &tmp);

	pt->timing.border_top = !rc ? tmp : 0;

	rc = of_property_read_u32(np, "qcom,mdss-dsi-v-bottom-border", &tmp);

drivers/video/msm/mdss/mdss_mdp_layer.c

+9 −0
Original line number Diff line number Diff line
@@ -488,6 +488,15 @@ static int __configure_pipe_params(struct msm_fb_data_type *mfd, 
	pipe->blend_op = layer->blend_op;

	pipe->async_update = (layer->flags & MDP_LAYER_ASYNC) ? true : false;



	if (mixer->ctl) {

		pipe->dst.x += mixer->ctl->border_x_off;

		pipe->dst.y += mixer->ctl->border_y_off;

	}

	pr_debug("src{%d,%d,%d,%d}, dst{%d,%d,%d,%d}, border{%d,%d}\n",

		pipe->src.x, pipe->src.y, pipe->src.w, pipe->src.h,

		pipe->dst.x, pipe->dst.y, pipe->dst.w, pipe->dst.h,

		mixer->ctl->border_x_off, mixer->ctl->border_y_off);



	flags = pipe->flags;

	if (is_single_layer)

		flags |= PERF_CALC_PIPE_SINGLE_LAYER;