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Commit 9a8a2213 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: Vebox ringbuffer init 



v2: Add set_seqno which didn't exist before rebase (Haihao)

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarXiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent f72a1183

drivers/gpu/drm/i915/i915_gem.c

+10 −1
Original line number Diff line number Diff line
@@ -4013,12 +4013,21 @@ static int i915_gem_init_rings(struct drm_device *dev) 
			goto cleanup_bsd_ring;

	}



	ret = i915_gem_set_seqno(dev, ((u32)~0 - 0x1000));

	if (HAS_VEBOX(dev)) {

		ret = intel_init_vebox_ring_buffer(dev);

		if (ret)

			goto cleanup_blt_ring;

	}





	ret = i915_gem_set_seqno(dev, ((u32)~0 - 0x1000));

	if (ret)

		goto cleanup_vebox_ring;



	return 0;



cleanup_vebox_ring:

	intel_cleanup_ring_buffer(&dev_priv->ring[VECS]);

cleanup_blt_ring:

	intel_cleanup_ring_buffer(&dev_priv->ring[BCS]);

cleanup_bsd_ring:

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -620,6 +620,7 @@ 
#define DONE_REG		0x40b0

#define BSD_HWS_PGA_GEN7	(0x04180)

#define BLT_HWS_PGA_GEN7	(0x04280)

#define VEBOX_HWS_PGA_GEN7	(0x04380)

#define RING_ACTHD(base)	((base)+0x74)

#define RING_NOPID(base)	((base)+0x94)

#define RING_IMR(base)		((base)+0xa8)

drivers/gpu/drm/i915/intel_ringbuffer.c

+34 −1
Original line number Diff line number Diff line
@@ -916,7 +916,8 @@ void intel_ring_setup_status_page(struct intel_ring_buffer *ring) 
			mmio = BSD_HWS_PGA_GEN7;

			break;

		case VECS:

			BUG();

			mmio = VEBOX_HWS_PGA_GEN7;

			break;

		}

	} else if (IS_GEN6(ring->dev)) {

		mmio = RING_HWS_PGA_GEN6(ring->mmio_base);
@@ -1909,6 +1910,38 @@ int intel_init_blt_ring_buffer(struct drm_device *dev) 
	return intel_init_ring_buffer(dev, ring);

}



int intel_init_vebox_ring_buffer(struct drm_device *dev)

{

	drm_i915_private_t *dev_priv = dev->dev_private;

	struct intel_ring_buffer *ring = &dev_priv->ring[VECS];



	ring->name = "video enhancement ring";

	ring->id = VECS;



	ring->mmio_base = VEBOX_RING_BASE;

	ring->write_tail = ring_write_tail;

	ring->flush = gen6_ring_flush;

	ring->add_request = gen6_add_request;

	ring->get_seqno = gen6_ring_get_seqno;

	ring->set_seqno = ring_set_seqno;

	ring->irq_enable_mask = 0;

	ring->irq_get = NULL;

	ring->irq_put = NULL;

	ring->dispatch_execbuffer = gen6_ring_dispatch_execbuffer;

	ring->sync_to = gen6_ring_sync;

	ring->semaphore_register[RCS] = MI_SEMAPHORE_SYNC_VER;

	ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_VEV;

	ring->semaphore_register[BCS] = MI_SEMAPHORE_SYNC_VEB;

	ring->semaphore_register[VECS] = MI_SEMAPHORE_SYNC_INVALID;

	ring->signal_mbox[RCS] = GEN6_RVESYNC;

	ring->signal_mbox[VCS] = GEN6_VVESYNC;

	ring->signal_mbox[BCS] = GEN6_BVESYNC;

	ring->signal_mbox[VECS] = GEN6_NOSYNC;

	ring->init = init_ring_common;



	return intel_init_ring_buffer(dev, ring);

}



int

intel_ring_flush_all_caches(struct intel_ring_buffer *ring)

{

drivers/gpu/drm/i915/intel_ringbuffer.h

+1 −0
Original line number Diff line number Diff line
@@ -234,6 +234,7 @@ int intel_ring_invalidate_all_caches(struct intel_ring_buffer *ring); 
int intel_init_render_ring_buffer(struct drm_device *dev);

int intel_init_bsd_ring_buffer(struct drm_device *dev);

int intel_init_blt_ring_buffer(struct drm_device *dev);

int intel_init_vebox_ring_buffer(struct drm_device *dev);



u32 intel_ring_get_active_head(struct intel_ring_buffer *ring);

void intel_ring_setup_status_page(struct intel_ring_buffer *ring);