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Commit 9a5f019b authored by Eric Hustvedt's avatar Eric Hustvedt Committed by Dave Airlie
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intelfb: add vsync interrupt support 



[02/05] intelfb: Add interrupt related register definitions

Add constants for accessing HWSTAM, IER, IIR, and IMR registers.
Add constants for interrupt types supported by the 8xx and 9xx chipsets.
The registers are also stored in the hwstate struct and dumped in the debug routine.

Signed-off-by: default avatarEric Hustvedt <ehustvedt@cecropia.com>
parent 3ce6fb43

drivers/video/intelfb/intelfb.h

+4 −0
Original line number Diff line number Diff line
@@ -195,6 +195,10 @@ struct intelfb_hwstate { 
	u32 mem_mode;

	u32 fw_blc_0;

	u32 fw_blc_1;

	u16 hwstam;

	u16 ier;

	u16 iir;

	u16 imr;

};



struct intelfb_heap_data {

drivers/video/intelfb/intelfbhw.c

+9 −0
Original line number Diff line number Diff line
@@ -587,6 +587,11 @@ intelfbhw_read_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw, 
	hw->fw_blc_0 = INREG(FW_BLC_0);

	hw->fw_blc_1 = INREG(FW_BLC_1);



	hw->hwstam = INREG16(HWSTAM);

	hw->ier = INREG16(IER);

	hw->iir = INREG16(IIR);

	hw->imr = INREG16(IMR);



	return 0;

}
@@ -796,6 +801,10 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw) 
	printk("	FW_BLC_0		0x%08x\n", hw->fw_blc_0);

	printk("	FW_BLC_1		0x%08x\n", hw->fw_blc_1);



	printk("	HWSTAM			0x%04x\n", hw->hwstam);

	printk("	IER			0x%04x\n", hw->ier);

	printk("	IIR			0x%04x\n", hw->iir);

	printk("	IMR			0x%04x\n", hw->imr);

	printk("hw state dump end\n");

#endif

}

drivers/video/intelfb/intelfbhw.h

+13 −0
Original line number Diff line number Diff line
@@ -88,6 +88,19 @@ 
#define INSTDONE		0x2090

#define PRI_RING_EMPTY			1



#define HWSTAM			0x2098

#define IER			0x20A0

#define IIR			0x20A4

#define IMR			0x20A8

#define VSYNC_PIPE_A_INTERRUPT		(1 << 7)

#define PIPE_A_EVENT_INTERRUPT		(1 << 4)

#define VSYNC_PIPE_B_INTERRUPT		(1 << 5)

#define PIPE_B_EVENT_INTERRUPT		(1 << 4)

#define HOST_PORT_EVENT_INTERRUPT	(1 << 3)

#define CAPTURE_EVENT_INTERRUPT		(1 << 2)

#define USER_DEFINED_INTERRUPT		(1 << 1)

#define BREAKPOINT_INTERRUPT		1



#define INSTPM			0x20c0

#define SYNC_FLUSH_ENABLE		(1 << 5)