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Commit 99fb4d34 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86: unmask CPUID levels on Intel CPUs, fix 



Impact: fix boot hang on pre-model-15 Intel CPUs

rdmsrl_safe() does not work in very early bootup code yet, because we
dont have the pagefault handler installed yet so exception section
does not get parsed. rdmsr_safe() will just crash and hang the bootup.

So limit the MSR_IA32_MISC_ENABLE MSR read to those CPU types that
support it.

Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent ef5fa0ab

arch/x86/kernel/cpu/intel.c

+11 −8
Original line number Diff line number Diff line
@@ -29,15 +29,18 @@ 


static void __cpuinit early_init_intel(struct cpuinfo_x86 *c)

{

	/* Unmask CPUID levels if masked: */

	if (c->x86 == 6 && c->x86_model >= 15) {

		u64 misc_enable;



	/* Unmask CPUID levels if masked */

	if (!rdmsrl_safe(MSR_IA32_MISC_ENABLE, &misc_enable) &&

	    (misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID)) {

		rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);



		if (misc_enable & MSR_IA32_MISC_ENABLE_LIMIT_CPUID) {

			misc_enable &= ~MSR_IA32_MISC_ENABLE_LIMIT_CPUID;

			wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable);

			c->cpuid_level = cpuid_eax(0);

		}

	}



	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||

		(c->x86 == 0x6 && c->x86_model >= 0x0e))