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Commit 98954f4b authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'omap-for-v3.16/soc-signed' of... 

Merge tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Pull "ARM: omap soc changes for v3.16 merge window" from Tony Lindgren:

SoC related changes for omaps.

* tag 'omap-for-v3.16/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: DRA752: add detection of SoC information
  ARM: OMAP2+: Remove suspend_set_ops from common pm late init
  ARM: OMAP2+: hwmod: OMAP5 DSS hwmod data
  ARM: omap4: hwmod_data: Clean up audio related structures (remove/merge them)

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e58cf019 733d20ee

arch/arm/mach-omap2/id.c

+37 −0
Original line number Diff line number Diff line
@@ -628,6 +628,41 @@ void __init omap5xxx_check_revision(void) 
	pr_info("%s %s\n", soc_name, soc_rev);

}



void __init dra7xxx_check_revision(void)

{

	u32 idcode;

	u16 hawkeye;

	u8 rev;



	idcode = read_tap_reg(OMAP_TAP_IDCODE);

	hawkeye = (idcode >> 12) & 0xffff;

	rev = (idcode >> 28) & 0xff;

	switch (hawkeye) {

	case 0xb990:

		switch (rev) {

		case 0:

			omap_revision = DRA752_REV_ES1_0;

			break;

		case 1:

		default:

			omap_revision = DRA752_REV_ES1_1;

		}

		break;



	default:

		/* Unknown default to latest silicon rev as default*/

		pr_warn("%s: unknown idcode=0x%08x (hawkeye=0x%08x,rev=0x%d)\n",

			__func__, idcode, hawkeye, rev);

		omap_revision = DRA752_REV_ES1_1;

	}



	sprintf(soc_name, "DRA%03x", omap_rev() >> 16);

	sprintf(soc_rev, "ES%d.%d", (omap_rev() >> 12) & 0xf,

		(omap_rev() >> 8) & 0xf);



	pr_info("%s %s\n", soc_name, soc_rev);

}



/*

 * Set up things for map_io and processor detection later on. Gets called

 * pretty much first thing from board init. For multi-omap, this gets
@@ -669,6 +704,8 @@ static const char * __init omap_get_family(void) 
		return kasprintf(GFP_KERNEL, "OMAP5");

	else if (soc_is_am43xx())

		return kasprintf(GFP_KERNEL, "AM43xx");

	else if (soc_is_dra7xx())

		return kasprintf(GFP_KERNEL, "DRA7");

	else

		return kasprintf(GFP_KERNEL, "Unknown");

}

arch/arm/mach-omap2/io.c

+1 −0
Original line number Diff line number Diff line
@@ -693,6 +693,7 @@ void __init dra7xx_init_early(void) 
	omap_prm_base_init();

	omap_cm_base_init();

	omap44xx_prm_init();

	dra7xxx_check_revision();

	dra7xx_powerdomains_init();

	dra7xx_clockdomains_init();

	dra7xx_hwmod_init();

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+9 −90
Original line number Diff line number Diff line
@@ -3635,15 +3635,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_dmic_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> dmic (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_dmic_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* dsp -> iva */
@@ -4209,15 +4201,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcbsp1_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> mcbsp1 (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcbsp1_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_abe -> mcbsp2 */
@@ -4225,15 +4209,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcbsp2_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> mcbsp2 (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcbsp2_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_abe -> mcbsp3 */
@@ -4241,15 +4217,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcbsp3_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> mcbsp3 (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcbsp3_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_per -> mcbsp4 */
@@ -4265,15 +4233,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcpdm_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> mcpdm (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_mcpdm_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_per -> mcspi1 */
@@ -4575,15 +4535,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer5_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> timer5 (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer5_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_abe -> timer6 */
@@ -4591,15 +4543,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer6_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> timer6 (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer6_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_abe -> timer7 */
@@ -4607,15 +4551,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer7_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> timer7 (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer7_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_abe -> timer8 */
@@ -4623,15 +4559,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { 
	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer8_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_MPU,

};



/* l4_abe -> timer8 (dma) */

static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = {

	.master		= &omap44xx_l4_abe_hwmod,

	.slave		= &omap44xx_timer8_hwmod,

	.clk		= "ocp_abe_iclk",

	.user		= OCP_USER_SDMA,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l4_per -> timer9 */
@@ -4831,7 +4759,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { 
	&omap44xx_l3_instr__debugss,

	&omap44xx_l4_cfg__dma_system,

	&omap44xx_l4_abe__dmic,

	&omap44xx_l4_abe__dmic_dma,

	&omap44xx_dsp__iva,

	/* &omap44xx_dsp__sl2if, */

	&omap44xx_l4_cfg__dsp,
@@ -4874,14 +4801,10 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { 
	&omap44xx_l4_abe__mcasp,

	&omap44xx_l4_abe__mcasp_dma,

	&omap44xx_l4_abe__mcbsp1,

	&omap44xx_l4_abe__mcbsp1_dma,

	&omap44xx_l4_abe__mcbsp2,

	&omap44xx_l4_abe__mcbsp2_dma,

	&omap44xx_l4_abe__mcbsp3,

	&omap44xx_l4_abe__mcbsp3_dma,

	&omap44xx_l4_per__mcbsp4,

	&omap44xx_l4_abe__mcpdm,

	&omap44xx_l4_abe__mcpdm_dma,

	&omap44xx_l4_per__mcspi1,

	&omap44xx_l4_per__mcspi2,

	&omap44xx_l4_per__mcspi3,
@@ -4913,13 +4836,9 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { 
	&omap44xx_l4_per__timer3,

	&omap44xx_l4_per__timer4,

	&omap44xx_l4_abe__timer5,

	&omap44xx_l4_abe__timer5_dma,

	&omap44xx_l4_abe__timer6,

	&omap44xx_l4_abe__timer6_dma,

	&omap44xx_l4_abe__timer7,

	&omap44xx_l4_abe__timer7_dma,

	&omap44xx_l4_abe__timer8,

	&omap44xx_l4_abe__timer8_dma,

	&omap44xx_l4_per__timer9,

	&omap44xx_l4_per__timer10,

	&omap44xx_l4_per__timer11,

arch/arm/mach-omap2/omap_hwmod_54xx_data.c

+283 −0
Original line number Diff line number Diff line
@@ -333,6 +333,235 @@ static struct omap_hwmod omap54xx_dmic_hwmod = { 
	},

};



/*

 * 'dss' class

 * display sub-system

 */

static struct omap_hwmod_class_sysconfig omap54xx_dss_sysc = {

	.rev_offs	= 0x0000,

	.syss_offs	= 0x0014,

	.sysc_flags	= SYSS_HAS_RESET_STATUS,

};



static struct omap_hwmod_class omap54xx_dss_hwmod_class = {

	.name	= "dss",

	.sysc	= &omap54xx_dss_sysc,

	.reset	= omap_dss_reset,

};



/* dss */

static struct omap_hwmod_opt_clk dss_opt_clks[] = {

	{ .role = "32khz_clk", .clk = "dss_32khz_clk" },

	{ .role = "sys_clk", .clk = "dss_sys_clk" },

	{ .role = "hdmi_clk", .clk = "dss_48mhz_clk" },

};



static struct omap_hwmod omap54xx_dss_hwmod = {

	.name		= "dss_core",

	.class		= &omap54xx_dss_hwmod_class,

	.clkdm_name	= "dss_clkdm",

	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,

	.main_clk	= "dss_dss_clk",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,

			.context_offs = OMAP54XX_RM_DSS_DSS_CONTEXT_OFFSET,

			.modulemode   = MODULEMODE_SWCTRL,

		},

	},

	.opt_clks	= dss_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(dss_opt_clks),

};



/*

 * 'dispc' class

 * display controller

 */



static struct omap_hwmod_class_sysconfig omap54xx_dispc_sysc = {

	.rev_offs	= 0x0000,

	.sysc_offs	= 0x0010,

	.syss_offs	= 0x0014,

	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |

			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_MIDLEMODE |

			   SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |

			   SYSS_HAS_RESET_STATUS),

	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |

			   MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),

	.sysc_fields	= &omap_hwmod_sysc_type1,

};



static struct omap_hwmod_class omap54xx_dispc_hwmod_class = {

	.name	= "dispc",

	.sysc	= &omap54xx_dispc_sysc,

};



/* dss_dispc */

static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = {

	{ .role = "sys_clk", .clk = "dss_sys_clk" },

};



/* dss_dispc dev_attr */

static struct omap_dss_dispc_dev_attr dss_dispc_dev_attr = {

	.has_framedonetv_irq	= 1,

	.manager_count		= 4,

};



static struct omap_hwmod omap54xx_dss_dispc_hwmod = {

	.name		= "dss_dispc",

	.class		= &omap54xx_dispc_hwmod_class,

	.clkdm_name	= "dss_clkdm",

	.main_clk	= "dss_dss_clk",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,

			.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,

		},

	},

	.opt_clks	= dss_dispc_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(dss_dispc_opt_clks),

	.dev_attr	= &dss_dispc_dev_attr,

};



/*

 * 'dsi1' class

 * display serial interface controller

 */



static struct omap_hwmod_class_sysconfig omap54xx_dsi1_sysc = {

	.rev_offs	= 0x0000,

	.sysc_offs	= 0x0010,

	.syss_offs	= 0x0014,

	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |

			   SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |

			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),

	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),

	.sysc_fields	= &omap_hwmod_sysc_type1,

};



static struct omap_hwmod_class omap54xx_dsi1_hwmod_class = {

	.name	= "dsi1",

	.sysc	= &omap54xx_dsi1_sysc,

};



/* dss_dsi1_a */

static struct omap_hwmod_opt_clk dss_dsi1_a_opt_clks[] = {

	{ .role = "sys_clk", .clk = "dss_sys_clk" },

};



static struct omap_hwmod omap54xx_dss_dsi1_a_hwmod = {

	.name		= "dss_dsi1",

	.class		= &omap54xx_dsi1_hwmod_class,

	.clkdm_name	= "dss_clkdm",

	.main_clk	= "dss_dss_clk",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,

			.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,

		},

	},

	.opt_clks	= dss_dsi1_a_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(dss_dsi1_a_opt_clks),

};



/* dss_dsi1_c */

static struct omap_hwmod_opt_clk dss_dsi1_c_opt_clks[] = {

	{ .role = "sys_clk", .clk = "dss_sys_clk" },

};



static struct omap_hwmod omap54xx_dss_dsi1_c_hwmod = {

	.name		= "dss_dsi2",

	.class		= &omap54xx_dsi1_hwmod_class,

	.clkdm_name	= "dss_clkdm",

	.main_clk	= "dss_dss_clk",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,

			.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,

		},

	},

	.opt_clks	= dss_dsi1_c_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(dss_dsi1_c_opt_clks),

};



/*

 * 'hdmi' class

 * hdmi controller

 */



static struct omap_hwmod_class_sysconfig omap54xx_hdmi_sysc = {

	.rev_offs	= 0x0000,

	.sysc_offs	= 0x0010,

	.sysc_flags	= (SYSC_HAS_RESET_STATUS | SYSC_HAS_SIDLEMODE |

			   SYSC_HAS_SOFTRESET),

	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |

			   SIDLE_SMART_WKUP),

	.sysc_fields	= &omap_hwmod_sysc_type2,

};



static struct omap_hwmod_class omap54xx_hdmi_hwmod_class = {

	.name	= "hdmi",

	.sysc	= &omap54xx_hdmi_sysc,

};



static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = {

	{ .role = "sys_clk", .clk = "dss_sys_clk" },

};



static struct omap_hwmod omap54xx_dss_hdmi_hwmod = {

	.name		= "dss_hdmi",

	.class		= &omap54xx_hdmi_hwmod_class,

	.clkdm_name	= "dss_clkdm",

	.main_clk	= "dss_48mhz_clk",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,

			.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,

		},

	},

	.opt_clks	= dss_hdmi_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(dss_hdmi_opt_clks),

};



/*

 * 'rfbi' class

 * remote frame buffer interface

 */



static struct omap_hwmod_class_sysconfig omap54xx_rfbi_sysc = {

	.rev_offs	= 0x0000,

	.sysc_offs	= 0x0010,

	.syss_offs	= 0x0014,

	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |

			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),

	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),

	.sysc_fields	= &omap_hwmod_sysc_type1,

};



static struct omap_hwmod_class omap54xx_rfbi_hwmod_class = {

	.name	= "rfbi",

	.sysc	= &omap54xx_rfbi_sysc,

};



/* dss_rfbi */

static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = {

	{ .role = "ick", .clk = "l3_iclk_div" },

};



static struct omap_hwmod omap54xx_dss_rfbi_hwmod = {

	.name		= "dss_rfbi",

	.class		= &omap54xx_rfbi_hwmod_class,

	.clkdm_name	= "dss_clkdm",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP54XX_CM_DSS_DSS_CLKCTRL_OFFSET,

			.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,

		},

	},

	.opt_clks	= dss_rfbi_opt_clks,

	.opt_clks_cnt	= ARRAY_SIZE(dss_rfbi_opt_clks),

};



/*

 * 'emif' class

 * external memory interface no1 (wrapper)
@@ -1974,6 +2203,54 @@ static struct omap_hwmod_ocp_if omap54xx_l4_abe__dmic = { 
	.user		= OCP_USER_MPU,

};



/* l3_main_2 -> dss */

static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss = {

	.master		= &omap54xx_l3_main_2_hwmod,

	.slave		= &omap54xx_dss_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l3_main_2 -> dss_dispc */

static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dispc = {

	.master		= &omap54xx_l3_main_2_hwmod,

	.slave		= &omap54xx_dss_dispc_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l3_main_2 -> dss_dsi1_a */

static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dsi1_a = {

	.master		= &omap54xx_l3_main_2_hwmod,

	.slave		= &omap54xx_dss_dsi1_a_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l3_main_2 -> dss_dsi1_c */

static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_dsi1_c = {

	.master		= &omap54xx_l3_main_2_hwmod,

	.slave		= &omap54xx_dss_dsi1_c_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l3_main_2 -> dss_hdmi */

static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_hdmi = {

	.master		= &omap54xx_l3_main_2_hwmod,

	.slave		= &omap54xx_dss_hdmi_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* l3_main_2 -> dss_rfbi */

static struct omap_hwmod_ocp_if omap54xx_l3_main_2__dss_rfbi = {

	.master		= &omap54xx_l3_main_2_hwmod,

	.slave		= &omap54xx_dss_rfbi_hwmod,

	.clk		= "l3_iclk_div",

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



/* mpu -> emif1 */

static struct omap_hwmod_ocp_if omap54xx_mpu__emif1 = {

	.master		= &omap54xx_mpu_hwmod,
@@ -2427,6 +2704,12 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { 
	&omap54xx_l4_cfg__dma_system,

	&omap54xx_l4_abe__dmic,

	&omap54xx_l4_cfg__mmu_dsp,

	&omap54xx_l3_main_2__dss,

	&omap54xx_l3_main_2__dss_dispc,

	&omap54xx_l3_main_2__dss_dsi1_a,

	&omap54xx_l3_main_2__dss_dsi1_c,

	&omap54xx_l3_main_2__dss_hdmi,

	&omap54xx_l3_main_2__dss_rfbi,

	&omap54xx_mpu__emif1,

	&omap54xx_mpu__emif2,

	&omap54xx_l4_wkup__gpio1,

arch/arm/mach-omap2/pm.c

+12 −5
Original line number Diff line number Diff line
@@ -32,11 +32,13 @@ 
#include "pm.h"

#include "twl-common.h"



#ifdef CONFIG_SUSPEND

/*

 * omap_pm_suspend: points to a function that does the SoC-specific

 * suspend work

 */

int (*omap_pm_suspend)(void);

static int (*omap_pm_suspend)(void);

#endif



#ifdef CONFIG_PM

/**
@@ -243,6 +245,15 @@ static const struct platform_suspend_ops omap_pm_ops = { 
	.valid		= suspend_valid_only_mem,

};



/**

 * omap_common_suspend_init - Set common suspend routines for OMAP SoCs

 * @pm_suspend: function pointer to SoC specific suspend function

 */

void omap_common_suspend_init(void *pm_suspend)

{

	omap_pm_suspend = pm_suspend;

	suspend_set_ops(&omap_pm_ops);

}

#endif /* CONFIG_SUSPEND */



static void __init omap3_init_voltages(void)
@@ -310,9 +321,5 @@ int __init omap2_common_pm_late_init(void) 
	/* cpufreq dummy device instantiation */

	omap_init_cpufreq();



#ifdef CONFIG_SUSPEND

	suspend_set_ops(&omap_pm_ops);

#endif



	return 0;

}