Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 980f9235 authored by Greg Ungerer's avatar Greg Ungerer
Browse files

m68knommu: clean up ColdFire 528x interrupt setup



With the common intc-2 interrupt controller code in place the ColdFire
528x family startup code can be greatly simplified. Remove all the
interrupt masking code, and the per-device interrupt config here.

Signed-off-by: default avatarGreg Ungerer <gerg@uclinux.org>
parent 1b718c71
Loading
Loading
Loading
Loading
+2 −49
Original line number Diff line number Diff line
@@ -3,8 +3,8 @@
/*
 *	linux/arch/m68knommu/platform/528x/config.c
 *
 *	Sub-architcture dependant initialization code for the Motorola
 *	5280 and 5282 CPUs.
 *	Sub-architcture dependant initialization code for the Freescale
 *	5280, 5281 and 5282 CPUs.
 *
 *	Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
 *	Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
@@ -15,20 +15,13 @@
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>

#ifdef CONFIG_MTD_PARTITIONS
#include <linux/mtd/partitions.h>
#endif

/***************************************************************************/

static struct mcf_platform_uart m528x_uart_platform[] = {
@@ -91,23 +84,13 @@ static struct platform_device *m528x_devices[] __initdata = {

/***************************************************************************/

#define	INTC0	(MCF_MBAR + MCFICM_INTC0)

static void __init m528x_uart_init_line(int line, int irq)
{
	u8 port;
	u32 imr;

	if ((line < 0) || (line > 2))
		return;

	/* level 6, line based priority */
	writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);

	imr = readl(INTC0 + MCFINTC_IMRL);
	imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
	writel(imr, INTC0 + MCFINTC_IMRL);

	/* make sure PUAPAR is set for UART0 and UART1 */
	if (line < 2) {
		port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
@@ -129,21 +112,8 @@ static void __init m528x_uarts_init(void)

static void __init m528x_fec_init(void)
{
	u32 imr;
	u16 v16;

	/* Unmask FEC interrupts at ColdFire interrupt controller */
	writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
	writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
	writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);

	imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
	imr &= ~0xf;
	writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
	imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
	imr &= ~0xff800001;
	writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);

	/* Set multi-function pins to ethernet mode for fec0 */
	v16 = readw(MCF_IPSBAR + 0x100056);
	writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
@@ -152,21 +122,6 @@ static void __init m528x_fec_init(void)

/***************************************************************************/

void mcf_disableall(void)
{
	*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
	*((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
}

/***************************************************************************/

void mcf_autovector(unsigned int vec)
{
	/* Everything is auto-vectored on the 5272 */
}

/***************************************************************************/

static void m528x_cpu_reset(void)
{
	local_irq_disable();
@@ -204,8 +159,6 @@ void wildfiremod_halt(void)

void __init config_BSP(char *commandp, int size)
{
	mcf_disableall();

#ifdef CONFIG_WILDFIRE
	mach_halt = wildfire_halt;
#endif