clk: qcom: gdsc: Add DT binding documentation

Qualcomm Global Distributed Switch Controller (GDSC) Regulator Driver

The GDSC driver, implemented under the regulator framework, is responsible for

safely collapsing and restoring power to peripheral cores on chipsets like

msm8974 for power savings.

Required properties:

 - compatible:      Must be "qcom,gdsc"

 - regulator-name:  A string used as a descriptive name for regulator outputs

 - reg:             The address of the GDSCR register

Optional properties:

 - parent-supply:   phandle to the parent supply/regulator node

 - clock-names:     List of string names for core clocks

 - qcom,retain-mem:  Presence denotes a hardware requirement to leave the

		     forced core memory retention signals in the core's clock

		     branch control registers asserted.

 - qcom,retain-periph: Presence denotes a hardware requirement to leave the

		     forced periph memory retention signal in the core's clock

		     branch control registers asserted.

 - qcom,skip-logic-collapse: Presence denotes a requirement to leave power to

                             the core's logic enabled.

 - qcom,support-hw-trigger: Presence denotes a hardware feature to switch

			    on/off this regulator based on internal HW signals

			    to save more power.

 - qcom,enable-root-clk: Presence denotes that the clocks in the "clocks"

			property are required to be enabled before gdsc is

			turned on and disabled before turning off gdsc. This

			will be used in subsystems where reset is synchronous

			and root clk is active without sw being aware of its

			state. The clock-name which denotes the root clock

			should be named as "core_root_clk".

 - reg-names:		Names of the bases for the above "reg" registers.

			Ex. "base", "domain_addr".

 - qcom,no-status-check-on-disable: Do not poll the status bit when GDSC

			is disabled.

Example:

	gdsc_oxili_gx: qcom,gdsc@fd8c4024 {

		compatible = "qcom,gdsc";

		regulator-name = "gdsc_oxili_gx";

		parent-supply = <&pm8841_s4>;

		reg = <0xfd8c4024 0x4>;

		clock-names = "core_clk";

	};