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Commit 970d14c6 authored by Olivier Grenie's avatar Olivier Grenie Committed by Mauro Carvalho Chehab
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V4L/DVB: dib7000p: add disable sample and hold, and diversity delay parameter



This patch improves the overall driver performance in
diversity-reception scenarios.

Signed-off-by: default avatarOlivier Grenie <olivier.grenie@dibcom.fr>
Signed-off-by: default avatarPatrick Boettcher <patrick.boettcher@dibcom.fr>
Cc: stable@kernel.org
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 90e12cec
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+1 −0
Original line number Diff line number Diff line
@@ -956,6 +956,7 @@ static struct dib7000p_config dib7770p_dib7000p_config = {

	.hostbus_diversity = 1,
	.enable_current_mirror = 1,
	.disable_sample_and_hold = 0,
};

static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
+5 −1
Original line number Diff line number Diff line
@@ -260,6 +260,7 @@ static void dib7000p_set_adc_state(struct dib7000p_state *state, enum dibx000_ad

//	dprintk( "908: %x, 909: %x\n", reg_908, reg_909);

	reg_909 |= (state->cfg.disable_sample_and_hold & 1) << 4;
	reg_908 |= (state->cfg.enable_current_mirror & 1) << 7;

	dib7000p_write_word(state, 908, reg_908);
@@ -780,7 +781,10 @@ static void dib7000p_set_channel(struct dib7000p_state *state, struct dvb_fronte
		default:
		case GUARD_INTERVAL_1_32: value *= 1; break;
	}
	state->div_sync_wait = (value * 3) / 2 + 32; // add 50% SFN margin + compensate for one DVSY-fifo TODO
	if (state->cfg.diversity_delay == 0)
		state->div_sync_wait = (value * 3) / 2 + 48; // add 50% SFN margin + compensate for one DVSY-fifo
	else
		state->div_sync_wait = (value * 3) / 2 + state->cfg.diversity_delay; // add 50% SFN margin + compensate for one DVSY-fifo

	/* deactive the possibility of diversity reception if extended interleaver */
	state->div_force_off = !1 && ch->u.ofdm.transmission_mode != TRANSMISSION_MODE_8K;
+2 −0
Original line number Diff line number Diff line
@@ -33,8 +33,10 @@ struct dib7000p_config {
	int (*agc_control) (struct dvb_frontend *, u8 before);

	u8 output_mode;
	u8 disable_sample_and_hold : 1;

	u8 enable_current_mirror : 1;
	u8 diversity_delay;

};