Loading arch/arm/mach-pxa/cm-x270.c +43 −19 Original line number Diff line number Diff line Loading @@ -176,33 +176,57 @@ static struct resource cmx270_2700G_resource[] = { }, }; static unsigned long save_lcd_regs[10]; static unsigned long cmx270_marathon_on[] = { GPIO58_GPIO, GPIO59_GPIO, GPIO60_GPIO, GPIO61_GPIO, GPIO62_GPIO, GPIO63_GPIO, GPIO64_GPIO, GPIO65_GPIO, GPIO66_GPIO, GPIO67_GPIO, GPIO68_GPIO, GPIO69_GPIO, GPIO70_GPIO, GPIO71_GPIO, GPIO72_GPIO, GPIO73_GPIO, GPIO74_GPIO, GPIO75_GPIO, GPIO76_GPIO, GPIO77_GPIO, }; static unsigned long cmx270_marathon_off[] = { GPIOxx_LCD_TFT_16BPP, }; static int cmx270_marathon_probe(struct fb_info *fb) { /* save PXA-270 pin settings before enabling 2700G */ save_lcd_regs[0] = GPDR1; save_lcd_regs[1] = GPDR2; save_lcd_regs[2] = GAFR1_U; save_lcd_regs[3] = GAFR2_L; save_lcd_regs[4] = GAFR2_U; /* Disable PXA-270 on-chip controller driving pins */ GPDR1 &= ~(0xfc000000); GPDR2 &= ~(0x00c03fff); GAFR1_U &= ~(0xfff00000); GAFR2_L &= ~(0x0fffffff); GAFR2_U &= ~(0x0000f000); int gpio, err; for (gpio = 58; gpio <= 77; gpio++) { err = gpio_request(gpio, "LCD"); if (err) return err; gpio_direction_input(gpio); } pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_on)); return 0; } static int cmx270_marathon_remove(struct fb_info *fb) { GPDR1 = save_lcd_regs[0]; GPDR2 = save_lcd_regs[1]; GAFR1_U = save_lcd_regs[2]; GAFR2_L = save_lcd_regs[3]; GAFR2_U = save_lcd_regs[4]; int gpio; pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_off)); for (gpio = 58; gpio <= 77; gpio++) gpio_free(gpio); return 0; } Loading Loading
arch/arm/mach-pxa/cm-x270.c +43 −19 Original line number Diff line number Diff line Loading @@ -176,33 +176,57 @@ static struct resource cmx270_2700G_resource[] = { }, }; static unsigned long save_lcd_regs[10]; static unsigned long cmx270_marathon_on[] = { GPIO58_GPIO, GPIO59_GPIO, GPIO60_GPIO, GPIO61_GPIO, GPIO62_GPIO, GPIO63_GPIO, GPIO64_GPIO, GPIO65_GPIO, GPIO66_GPIO, GPIO67_GPIO, GPIO68_GPIO, GPIO69_GPIO, GPIO70_GPIO, GPIO71_GPIO, GPIO72_GPIO, GPIO73_GPIO, GPIO74_GPIO, GPIO75_GPIO, GPIO76_GPIO, GPIO77_GPIO, }; static unsigned long cmx270_marathon_off[] = { GPIOxx_LCD_TFT_16BPP, }; static int cmx270_marathon_probe(struct fb_info *fb) { /* save PXA-270 pin settings before enabling 2700G */ save_lcd_regs[0] = GPDR1; save_lcd_regs[1] = GPDR2; save_lcd_regs[2] = GAFR1_U; save_lcd_regs[3] = GAFR2_L; save_lcd_regs[4] = GAFR2_U; /* Disable PXA-270 on-chip controller driving pins */ GPDR1 &= ~(0xfc000000); GPDR2 &= ~(0x00c03fff); GAFR1_U &= ~(0xfff00000); GAFR2_L &= ~(0x0fffffff); GAFR2_U &= ~(0x0000f000); int gpio, err; for (gpio = 58; gpio <= 77; gpio++) { err = gpio_request(gpio, "LCD"); if (err) return err; gpio_direction_input(gpio); } pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_on)); return 0; } static int cmx270_marathon_remove(struct fb_info *fb) { GPDR1 = save_lcd_regs[0]; GPDR2 = save_lcd_regs[1]; GAFR1_U = save_lcd_regs[2]; GAFR2_L = save_lcd_regs[3]; GAFR2_U = save_lcd_regs[4]; int gpio; pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx270_marathon_off)); for (gpio = 58; gpio <= 77; gpio++) gpio_free(gpio); return 0; } Loading