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Commit 96e28449 authored by David Gibson's avatar David Gibson Committed by Linus Torvalds
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[PATCH] ppc64: kill bitfields in ppc64 hash code 



This patch removes the use of bitfield types from the ppc64 hash table
manipulation code.

Signed-off-by: default avatarDavid Gibson <dwg@au1.ibm.com>
Acked-by: default avatarStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent f13487c6

arch/ppc64/kernel/iSeries_htab.c

+21 −30
Original line number Diff line number Diff line
@@ -38,11 +38,12 @@ static inline void iSeries_hunlock(unsigned long slot) 
}



static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,

			 unsigned long prpn, int secondary,

			 unsigned long hpteflags, int bolted, int large)

				unsigned long prpn, unsigned long vflags,

				unsigned long rflags)

{

	long slot;

	HPTE lhpte;

	hpte_t lhpte;

	int secondary = 0;



	/*

	 * The hypervisor tries both primary and secondary.
@@ -50,13 +51,13 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va, 
	 * it means we have already tried both primary and secondary,

	 * so we return failure immediately.

	 */

	if (secondary)

	if (vflags & HPTE_V_SECONDARY)

		return -1;



	iSeries_hlock(hpte_group);



	slot = HvCallHpt_findValid(&lhpte, va >> PAGE_SHIFT);

	BUG_ON(lhpte.dw0.dw0.v);

	BUG_ON(lhpte.v & HPTE_V_VALID);



	if (slot == -1)	{ /* No available entry found in either group */

		iSeries_hunlock(hpte_group);
@@ -64,19 +65,13 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va, 
	}



	if (slot < 0) {		/* MSB set means secondary group */

		vflags |= HPTE_V_VALID;

		secondary = 1;

		slot &= 0x7fffffffffffffff;

	}



	lhpte.dw1.dword1      = 0;

	lhpte.dw1.dw1.rpn     = physRpn_to_absRpn(prpn);

	lhpte.dw1.flags.flags = hpteflags;



	lhpte.dw0.dword0      = 0;

	lhpte.dw0.dw0.avpn    = va >> 23;

	lhpte.dw0.dw0.h       = secondary;

	lhpte.dw0.dw0.bolted  = bolted;

	lhpte.dw0.dw0.v       = 1;

	lhpte.v = (va >> 23) << HPTE_V_AVPN_SHIFT | vflags | HPTE_V_VALID;

	lhpte.r = (physRpn_to_absRpn(prpn) << HPTE_R_RPN_SHIFT) | rflags;



	/* Now fill in the actual HPTE */

	HvCallHpt_addValidate(slot, secondary, &lhpte);
@@ -88,20 +83,17 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va, 


static unsigned long iSeries_hpte_getword0(unsigned long slot)

{

	unsigned long dword0;

	HPTE hpte;

	hpte_t hpte;



	HvCallHpt_get(&hpte, slot);

	dword0 = hpte.dw0.dword0;



	return dword0;

	return hpte.v;

}



static long iSeries_hpte_remove(unsigned long hpte_group)

{

	unsigned long slot_offset;

	int i;

	HPTE lhpte;

	unsigned long hpte_v;



	/* Pick a random slot to start at */

	slot_offset = mftb() & 0x7;
@@ -109,10 +101,9 @@ static long iSeries_hpte_remove(unsigned long hpte_group) 
	iSeries_hlock(hpte_group);



	for (i = 0; i < HPTES_PER_GROUP; i++) {

		lhpte.dw0.dword0 = 

			iSeries_hpte_getword0(hpte_group + slot_offset);

		hpte_v = iSeries_hpte_getword0(hpte_group + slot_offset);



		if (!lhpte.dw0.dw0.bolted) {

		if (! (hpte_v & HPTE_V_BOLTED)) {

			HvCallHpt_invalidateSetSwBitsGet(hpte_group + 

							 slot_offset, 0, 0);

			iSeries_hunlock(hpte_group);
@@ -137,13 +128,13 @@ static long iSeries_hpte_remove(unsigned long hpte_group) 
static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp,

				  unsigned long va, int large, int local)

{

	HPTE hpte;

	hpte_t hpte;

	unsigned long avpn = va >> 23;



	iSeries_hlock(slot);



	HvCallHpt_get(&hpte, slot);

	if ((hpte.dw0.dw0.avpn == avpn) && (hpte.dw0.dw0.v)) {

	if ((HPTE_V_AVPN_VAL(hpte.v) == avpn) && (hpte.v & HPTE_V_VALID)) {

		/*

		 * Hypervisor expects bits as NPPP, which is

		 * different from how they are mapped in our PP.
@@ -167,7 +158,7 @@ static long iSeries_hpte_updatepp(unsigned long slot, unsigned long newpp, 
 */

static long iSeries_hpte_find(unsigned long vpn)

{

	HPTE hpte;

	hpte_t hpte;

	long slot;



	/*
@@ -177,7 +168,7 @@ static long iSeries_hpte_find(unsigned long vpn) 
	 * 0x80000000xxxxxxxx : Entry found in secondary group, slot x

	 */

	slot = HvCallHpt_findValid(&hpte, vpn); 

	if (hpte.dw0.dw0.v) {

	if (hpte.v & HPTE_V_VALID) {

		if (slot < 0) {

			slot &= 0x7fffffffffffffff;

			slot = -slot;
@@ -212,7 +203,7 @@ static void iSeries_hpte_updateboltedpp(unsigned long newpp, unsigned long ea) 
static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va,

				    int large, int local)

{

	HPTE lhpte;

	unsigned long hpte_v;

	unsigned long avpn = va >> 23;

	unsigned long flags;
@@ -220,9 +211,9 @@ static void iSeries_hpte_invalidate(unsigned long slot, unsigned long va, 


	iSeries_hlock(slot);



	lhpte.dw0.dword0 = iSeries_hpte_getword0(slot);

	hpte_v = iSeries_hpte_getword0(slot);

	

	if ((lhpte.dw0.dw0.avpn == avpn) && lhpte.dw0.dw0.v)

	if ((HPTE_V_AVPN_VAL(hpte_v) == avpn) && (hpte_v & HPTE_V_VALID))

		HvCallHpt_invalidateSetSwBitsGet(slot, 0, 0);



	iSeries_hunlock(slot);

arch/ppc64/kernel/iSeries_setup.c

+8 −10
Original line number Diff line number Diff line
@@ -503,7 +503,7 @@ static void __init build_iSeries_Memory_Map(void) 


	/* Fill in the hashed page table hash mask */

	num_ptegs = hptSizePages *

		(PAGE_SIZE / (sizeof(HPTE) * HPTES_PER_GROUP));

		(PAGE_SIZE / (sizeof(hpte_t) * HPTES_PER_GROUP));

	htab_hash_mask = num_ptegs - 1;



	/*
@@ -618,25 +618,23 @@ static void __init setup_iSeries_cache_sizes(void) 
static void iSeries_make_pte(unsigned long va, unsigned long pa,

			     int mode)

{

	HPTE local_hpte, rhpte;

	hpte_t local_hpte, rhpte;

	unsigned long hash, vpn;

	long slot;



	vpn = va >> PAGE_SHIFT;

	hash = hpt_hash(vpn, 0);



	local_hpte.dw1.dword1 = pa | mode;

	local_hpte.dw0.dword0 = 0;

	local_hpte.dw0.dw0.avpn = va >> 23;

	local_hpte.dw0.dw0.bolted = 1;		/* bolted */

	local_hpte.dw0.dw0.v = 1;

	local_hpte.r = pa | mode;

	local_hpte.v = ((va >> 23) << HPTE_V_AVPN_SHIFT)

		| HPTE_V_BOLTED | HPTE_V_VALID;



	slot = HvCallHpt_findValid(&rhpte, vpn);

	if (slot < 0) {

		/* Must find space in primary group */

		panic("hash_page: hpte already exists\n");

	}

	HvCallHpt_addValidate(slot, 0, (HPTE *)&local_hpte );

	HvCallHpt_addValidate(slot, 0, &local_hpte);

}



/*
@@ -646,7 +644,7 @@ static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr) 
{

	unsigned long pa;

	unsigned long mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;

	HPTE hpte;

	hpte_t hpte;



	for (pa = saddr; pa < eaddr ;pa += PAGE_SIZE) {

		unsigned long ea = (unsigned long)__va(pa);
@@ -659,7 +657,7 @@ static void __init iSeries_bolt_kernel(unsigned long saddr, unsigned long eaddr) 
		if (!in_kernel_text(ea))

			mode_rw |= HW_NO_EXEC;



		if (hpte.dw0.dw0.v) {

		if (hpte.v & HPTE_V_VALID) {

			/* HPTE exists, so just bolt it */

			HvCallHpt_setSwBits(slot, 0x10, 0);

			/* And make sure the pp bits are correct */

arch/ppc64/kernel/pSeries_lpar.c

+16 −31
Original line number Diff line number Diff line
@@ -277,31 +277,20 @@ void vpa_init(int cpu) 


long pSeries_lpar_hpte_insert(unsigned long hpte_group,

			      unsigned long va, unsigned long prpn,

			      int secondary, unsigned long hpteflags,

			      int bolted, int large)

			      unsigned long vflags, unsigned long rflags)

{

	unsigned long arpn = physRpn_to_absRpn(prpn);

	unsigned long lpar_rc;

	unsigned long flags;

	unsigned long slot;

	HPTE lhpte;

	unsigned long hpte_v, hpte_r;

	unsigned long dummy0, dummy1;



	/* Fill in the local HPTE with absolute rpn, avpn and flags */

	lhpte.dw1.dword1      = 0;

	lhpte.dw1.dw1.rpn     = arpn;

	lhpte.dw1.flags.flags = hpteflags;

	hpte_v = ((va >> 23) << HPTE_V_AVPN_SHIFT) | vflags | HPTE_V_VALID;

	if (vflags & HPTE_V_LARGE)

		hpte_v &= ~(1UL << HPTE_V_AVPN_SHIFT);



	lhpte.dw0.dword0      = 0;

	lhpte.dw0.dw0.avpn    = va >> 23;

	lhpte.dw0.dw0.h       = secondary;

	lhpte.dw0.dw0.bolted  = bolted;

	lhpte.dw0.dw0.v       = 1;



	if (large) {

		lhpte.dw0.dw0.l = 1;

		lhpte.dw0.dw0.avpn &= ~0x1UL;

	}

	hpte_r = (arpn << HPTE_R_RPN_SHIFT) | rflags;



	/* Now fill in the actual HPTE */

	/* Set CEC cookie to 0         */
@@ -312,11 +301,11 @@ long pSeries_lpar_hpte_insert(unsigned long hpte_group, 
	flags = 0;



	/* XXX why is this here? - Anton */

	if (hpteflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))

		lhpte.dw1.flags.flags &= ~_PAGE_COHERENT;

	if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))

		hpte_r &= ~_PAGE_COHERENT;



	lpar_rc = plpar_hcall(H_ENTER, flags, hpte_group, lhpte.dw0.dword0,

			      lhpte.dw1.dword1, &slot, &dummy0, &dummy1);

	lpar_rc = plpar_hcall(H_ENTER, flags, hpte_group, hpte_v,

			      hpte_r, &slot, &dummy0, &dummy1);



	if (unlikely(lpar_rc == H_PTEG_Full))

		return -1;
@@ -332,7 +321,7 @@ long pSeries_lpar_hpte_insert(unsigned long hpte_group, 
	/* Because of iSeries, we have to pass down the secondary

	 * bucket bit here as well

	 */

	return (slot & 7) | (secondary << 3);

	return (slot & 7) | (!!(vflags & HPTE_V_SECONDARY) << 3);

}



static DEFINE_SPINLOCK(pSeries_lpar_tlbie_lock);
@@ -427,22 +416,18 @@ static long pSeries_lpar_hpte_find(unsigned long vpn) 
	unsigned long hash;

	unsigned long i, j;

	long slot;

	union {

		unsigned long dword0;

		Hpte_dword0 dw0;

	} hpte_dw0;

	Hpte_dword0 dw0;

	unsigned long hpte_v;



	hash = hpt_hash(vpn, 0);



	for (j = 0; j < 2; j++) {

		slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;

		for (i = 0; i < HPTES_PER_GROUP; i++) {

			hpte_dw0.dword0 = pSeries_lpar_hpte_getword0(slot);

			dw0 = hpte_dw0.dw0;

			hpte_v = pSeries_lpar_hpte_getword0(slot);



			if ((dw0.avpn == (vpn >> 11)) && dw0.v &&

			    (dw0.h == j)) {

			if ((HPTE_V_AVPN_VAL(hpte_v) == (vpn >> 11))

			    && (hpte_v & HPTE_V_VALID)

			    && (!!(hpte_v & HPTE_V_SECONDARY) == j)) {

				/* HPTE matches */

				if (j)

					slot = -slot;

arch/ppc64/mm/hash_low.S

+2 −6
Original line number Diff line number Diff line
@@ -170,9 +170,7 @@ htab_insert_pte: 
	/* Call ppc_md.hpte_insert */

	ld	r7,STK_PARM(r4)(r1)	/* Retreive new pp bits */

	mr	r4,r29			/* Retreive va */

	li	r6,0			/* primary slot */

	li	r8,0			/* not bolted and not large */

	li	r9,0

	li	r6,0			/* no vflags */

_GLOBAL(htab_call_hpte_insert1)

	bl	.			/* Will be patched by htab_finish_init() */

	cmpdi	0,r3,0
@@ -192,9 +190,7 @@ _GLOBAL(htab_call_hpte_insert1) 
	/* Call ppc_md.hpte_insert */

	ld	r7,STK_PARM(r4)(r1)	/* Retreive new pp bits */

	mr	r4,r29			/* Retreive va */

	li	r6,1			/* secondary slot */

	li	r8,0			/* not bolted and not large */

	li	r9,0

	li	r6,HPTE_V_SECONDARY@l	/* secondary slot */

_GLOBAL(htab_call_hpte_insert2)

	bl	.			/* Will be patched by htab_finish_init() */

	cmpdi	0,r3,0

arch/ppc64/mm/hash_native.c

+59 −70
Original line number Diff line number Diff line
@@ -27,9 +27,9 @@ 


static DEFINE_SPINLOCK(native_tlbie_lock);



static inline void native_lock_hpte(HPTE *hptep)

static inline void native_lock_hpte(hpte_t *hptep)

{

	unsigned long *word = &hptep->dw0.dword0;

	unsigned long *word = &hptep->v;



	while (1) {

		if (!test_and_set_bit(HPTE_LOCK_BIT, word))
@@ -39,32 +39,28 @@ static inline void native_lock_hpte(HPTE *hptep) 
	}

}



static inline void native_unlock_hpte(HPTE *hptep)

static inline void native_unlock_hpte(hpte_t *hptep)

{

	unsigned long *word = &hptep->dw0.dword0;

	unsigned long *word = &hptep->v;



	asm volatile("lwsync":::"memory");

	clear_bit(HPTE_LOCK_BIT, word);

}



long native_hpte_insert(unsigned long hpte_group, unsigned long va,

			unsigned long prpn, int secondary,

			unsigned long hpteflags, int bolted, int large)

			unsigned long prpn, unsigned long vflags,

			unsigned long rflags)

{

	unsigned long arpn = physRpn_to_absRpn(prpn);

	HPTE *hptep = htab_address + hpte_group;

	Hpte_dword0 dw0;

	HPTE lhpte;

	hpte_t *hptep = htab_address + hpte_group;

	unsigned long hpte_v, hpte_r;

	int i;



	for (i = 0; i < HPTES_PER_GROUP; i++) {

		dw0 = hptep->dw0.dw0;



		if (!dw0.v) {

		if (! (hptep->v & HPTE_V_VALID)) {

			/* retry with lock held */

			native_lock_hpte(hptep);

			dw0 = hptep->dw0.dw0;

			if (!dw0.v)

			if (! (hptep->v & HPTE_V_VALID))

				break;

			native_unlock_hpte(hptep);

		}
@@ -75,56 +71,45 @@ long native_hpte_insert(unsigned long hpte_group, unsigned long va, 
	if (i == HPTES_PER_GROUP)

		return -1;



	lhpte.dw1.dword1      = 0;

	lhpte.dw1.dw1.rpn     = arpn;

	lhpte.dw1.flags.flags = hpteflags;



	lhpte.dw0.dword0      = 0;

	lhpte.dw0.dw0.avpn    = va >> 23;

	lhpte.dw0.dw0.h       = secondary;

	lhpte.dw0.dw0.bolted  = bolted;

	lhpte.dw0.dw0.v       = 1;



	if (large) {

		lhpte.dw0.dw0.l = 1;

		lhpte.dw0.dw0.avpn &= ~0x1UL;

	}



	hptep->dw1.dword1 = lhpte.dw1.dword1;

	hpte_v = (va >> 23) << HPTE_V_AVPN_SHIFT | vflags | HPTE_V_VALID;

	if (vflags & HPTE_V_LARGE)

		va &= ~(1UL << HPTE_V_AVPN_SHIFT);

	hpte_r = (arpn << HPTE_R_RPN_SHIFT) | rflags;



	hptep->r = hpte_r;

	/* Guarantee the second dword is visible before the valid bit */

	__asm__ __volatile__ ("eieio" : : : "memory");



	/*

	 * Now set the first dword including the valid bit

	 * NOTE: this also unlocks the hpte

	 */

	hptep->dw0.dword0 = lhpte.dw0.dword0;

	hptep->v = hpte_v;



	__asm__ __volatile__ ("ptesync" : : : "memory");



	return i | (secondary << 3);

	return i | (!!(vflags & HPTE_V_SECONDARY) << 3);

}



static long native_hpte_remove(unsigned long hpte_group)

{

	HPTE *hptep;

	Hpte_dword0 dw0;

	hpte_t *hptep;

	int i;

	int slot_offset;

	unsigned long hpte_v;



	/* pick a random entry to start at */

	slot_offset = mftb() & 0x7;



	for (i = 0; i < HPTES_PER_GROUP; i++) {

		hptep = htab_address + hpte_group + slot_offset;

		dw0 = hptep->dw0.dw0;

		hpte_v = hptep->v;



		if (dw0.v && !dw0.bolted) {

		if ((hpte_v & HPTE_V_VALID) && !(hpte_v & HPTE_V_BOLTED)) {

			/* retry with lock held */

			native_lock_hpte(hptep);

			dw0 = hptep->dw0.dw0;

			if (dw0.v && !dw0.bolted)

			hpte_v = hptep->v;

			if ((hpte_v & HPTE_V_VALID)

			    && !(hpte_v & HPTE_V_BOLTED))

				break;

			native_unlock_hpte(hptep);

		}
@@ -137,15 +122,15 @@ static long native_hpte_remove(unsigned long hpte_group) 
		return -1;



	/* Invalidate the hpte. NOTE: this also unlocks it */

	hptep->dw0.dword0 = 0;

	hptep->v = 0;



	return i;

}



static inline void set_pp_bit(unsigned long pp, HPTE *addr)

static inline void set_pp_bit(unsigned long pp, hpte_t *addr)

{

	unsigned long old;

	unsigned long *p = &addr->dw1.dword1;

	unsigned long *p = &addr->r;



	__asm__ __volatile__(

	"1:	ldarx	%0,0,%3\n\
@@ -163,11 +148,11 @@ static inline void set_pp_bit(unsigned long pp, HPTE *addr) 
 */

static long native_hpte_find(unsigned long vpn)

{

	HPTE *hptep;

	hpte_t *hptep;

	unsigned long hash;

	unsigned long i, j;

	long slot;

	Hpte_dword0 dw0;

	unsigned long hpte_v;



	hash = hpt_hash(vpn, 0);
@@ -175,10 +160,11 @@ static long native_hpte_find(unsigned long vpn) 
		slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;

		for (i = 0; i < HPTES_PER_GROUP; i++) {

			hptep = htab_address + slot;

			dw0 = hptep->dw0.dw0;

			hpte_v = hptep->v;



			if ((dw0.avpn == (vpn >> 11)) && dw0.v &&

			    (dw0.h == j)) {

			if ((HPTE_V_AVPN_VAL(hpte_v) == (vpn >> 11))

			    && (hpte_v & HPTE_V_VALID)

			    && ( !!(hpte_v & HPTE_V_SECONDARY) == j)) {

				/* HPTE matches */

				if (j)

					slot = -slot;
@@ -195,20 +181,21 @@ static long native_hpte_find(unsigned long vpn) 
static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,

				 unsigned long va, int large, int local)

{

	HPTE *hptep = htab_address + slot;

	Hpte_dword0 dw0;

	hpte_t *hptep = htab_address + slot;

	unsigned long hpte_v;

	unsigned long avpn = va >> 23;

	int ret = 0;



	if (large)

		avpn &= ~0x1UL;

		avpn &= ~1;



	native_lock_hpte(hptep);



	dw0 = hptep->dw0.dw0;

	hpte_v = hptep->v;



	/* Even if we miss, we need to invalidate the TLB */

	if ((dw0.avpn != avpn) || !dw0.v) {

	if ((HPTE_V_AVPN_VAL(hpte_v) != avpn)

	    || !(hpte_v & HPTE_V_VALID)) {

		native_unlock_hpte(hptep);

		ret = -1;

	} else {
@@ -244,7 +231,7 @@ static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea) 
{

	unsigned long vsid, va, vpn, flags = 0;

	long slot;

	HPTE *hptep;

	hpte_t *hptep;

	int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);



	vsid = get_kernel_vsid(ea);
@@ -269,26 +256,27 @@ static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea) 
static void native_hpte_invalidate(unsigned long slot, unsigned long va,

				    int large, int local)

{

	HPTE *hptep = htab_address + slot;

	Hpte_dword0 dw0;

	hpte_t *hptep = htab_address + slot;

	unsigned long hpte_v;

	unsigned long avpn = va >> 23;

	unsigned long flags;

	int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);



	if (large)

		avpn &= ~0x1UL;

		avpn &= ~1;



	local_irq_save(flags);

	native_lock_hpte(hptep);



	dw0 = hptep->dw0.dw0;

	hpte_v = hptep->v;



	/* Even if we miss, we need to invalidate the TLB */

	if ((dw0.avpn != avpn) || !dw0.v) {

	if ((HPTE_V_AVPN_VAL(hpte_v) != avpn)

	    || !(hpte_v & HPTE_V_VALID)) {

		native_unlock_hpte(hptep);

	} else {

		/* Invalidate the hpte. NOTE: this also unlocks it */

		hptep->dw0.dword0 = 0;

		hptep->v = 0;

	}



	/* Invalidate the tlb */
@@ -315,8 +303,8 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long va, 
static void native_hpte_clear(void)

{

	unsigned long slot, slots, flags;

	HPTE *hptep = htab_address;

	Hpte_dword0 dw0;

	hpte_t *hptep = htab_address;

	unsigned long hpte_v;

	unsigned long pteg_count;



	pteg_count = htab_hash_mask + 1;
@@ -336,11 +324,11 @@ static void native_hpte_clear(void) 
		 * running,  right?  and for crash dump, we probably

		 * don't want to wait for a maybe bad cpu.

		 */

		dw0 = hptep->dw0.dw0;

		hpte_v = hptep->v;



		if (dw0.v) {

			hptep->dw0.dword0 = 0;

			tlbie(slot2va(dw0.avpn, dw0.l, dw0.h, slot), dw0.l);

		if (hpte_v & HPTE_V_VALID) {

			hptep->v = 0;

			tlbie(slot2va(hpte_v, slot), hpte_v & HPTE_V_LARGE);

		}

	}
@@ -353,8 +341,8 @@ static void native_flush_hash_range(unsigned long context, 
{

	unsigned long vsid, vpn, va, hash, secondary, slot, flags, avpn;

	int i, j;

	HPTE *hptep;

	Hpte_dword0 dw0;

	hpte_t *hptep;

	unsigned long hpte_v;

	struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);



	/* XXX fix for large ptes */
@@ -390,14 +378,15 @@ static void native_flush_hash_range(unsigned long context, 


		native_lock_hpte(hptep);



		dw0 = hptep->dw0.dw0;

		hpte_v = hptep->v;



		/* Even if we miss, we need to invalidate the TLB */

		if ((dw0.avpn != avpn) || !dw0.v) {

		if ((HPTE_V_AVPN_VAL(hpte_v) != avpn)

		    || !(hpte_v & HPTE_V_VALID)) {

			native_unlock_hpte(hptep);

		} else {

			/* Invalidate the hpte. NOTE: this also unlocks it */

			hptep->dw0.dword0 = 0;

			hptep->v = 0;

		}



		j++;