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Commit 964ea475 authored by Stephen Warren's avatar Stephen Warren
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clk: tegra: fix enum tegra114_clk to match binding



A gap exists in the binding's clock ID definitions. Fix the clock driver
to be consistent. This allows pclk to be looked up through device tree
and prevents:

ERROR: could not get clock /pmc:pclk(0)

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent c604283f
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+1 −1
Original line number Diff line number Diff line
@@ -760,7 +760,7 @@ enum tegra114_clk {
	pll_re_vco, pll_re_out, pll_e_out0, spdif_in_sync, i2s0_sync,
	i2s1_sync, i2s2_sync, i2s3_sync, i2s4_sync, vimclk_sync, audio0,
	audio1, audio2, audio3, audio4, spdif, clk_out_1, clk_out_2, clk_out_3,
	blink, xusb_host_src, xusb_falcon_src, xusb_fs_src, xusb_ss_src,
	blink, xusb_host_src = 252, xusb_falcon_src, xusb_fs_src, xusb_ss_src,
	xusb_dev_src, xusb_dev, xusb_hs_src, sclk, hclk, pclk, cclk_g, cclk_lp,

	/* Mux clocks */