Loading arch/arm/mach-omap1/devices.c +27 −0 Original line number Diff line number Diff line Loading @@ -232,3 +232,30 @@ static int __init omap1_init_devices(void) } arch_initcall(omap1_init_devices); #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) static struct resource wdt_resources[] = { { .start = 0xfffeb000, .end = 0xfffeb07F, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap_wdt_device = { .name = "omap_wdt", .id = -1, .num_resources = ARRAY_SIZE(wdt_resources), .resource = wdt_resources, }; static int __init omap_init_wdt(void) { if (!cpu_is_omap16xx()) return; platform_device_register(&omap_wdt_device); return 0; } subsys_initcall(omap_init_wdt); #endif arch/arm/mach-omap2/devices.c +39 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/platform_device.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/err.h> #include <mach/hardware.h> #include <mach/irqs.h> Loading @@ -28,6 +29,8 @@ #include <mach/gpio.h> #include <plat/mmc.h> #include <plat/dma.h> #include <plat/omap_hwmod.h> #include <plat/omap_device.h> #include "mux.h" Loading Loading @@ -932,3 +935,39 @@ static int __init omap2_init_devices(void) return 0; } arch_initcall(omap2_init_devices); #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) struct omap_device_pm_latency omap_wdt_latency[] = { [0] = { .deactivate_func = omap_device_idle_hwmods, .activate_func = omap_device_enable_hwmods, .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, }, }; static int __init omap_init_wdt(void) { int id = -1; struct omap_device *od; struct omap_hwmod *oh; char *oh_name = "wd_timer2"; char *dev_name = "omap_wdt"; if (!cpu_class_is_omap2()) return 0; oh = omap_hwmod_lookup(oh_name); if (!oh) { pr_err("Could not look up wd_timer%d hwmod\n", id); return -EINVAL; } od = omap_device_build(dev_name, id, oh, NULL, 0, omap_wdt_latency, ARRAY_SIZE(omap_wdt_latency), 0); WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", dev_name, oh->name); return 0; } subsys_initcall(omap_init_wdt); #endif arch/arm/mach-omap2/omap_hwmod_2420_data.c +64 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" /* * OMAP2420 hardware module integration data Loading @@ -33,6 +34,7 @@ static struct omap_hwmod omap2420_mpu_hwmod; static struct omap_hwmod omap2420_iva_hwmod; static struct omap_hwmod omap2420_l3_main_hwmod; static struct omap_hwmod omap2420_l4_core_hwmod; static struct omap_hwmod omap2420_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { Loading Loading @@ -165,12 +167,74 @@ static struct omap_hwmod omap2420_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { { .pa_start = 0x48022000, .pa_end = 0x4802207f, .flags = ADDR_TYPE_RT }, }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .master = &omap2420_l4_wkup_hwmod, .slave = &omap2420_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2420_wd_timer2_addrs, .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on * overflow condition */ static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { .name = "wd_timer", .sysc = &omap2420_wd_timer_sysc, }; /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { &omap2420_l4_wkup__wd_timer2, }; static struct omap_hwmod omap2420_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap2420_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .module_offs = WKUP_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, }, }, .slaves = omap2420_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; static __initdata struct omap_hwmod *omap2420_hwmods[] = { &omap2420_l3_main_hwmod, &omap2420_l4_core_hwmod, &omap2420_l4_wkup_hwmod, &omap2420_mpu_hwmod, &omap2420_iva_hwmod, &omap2420_wd_timer2_hwmod, NULL, }; Loading arch/arm/mach-omap2/omap_hwmod_2430_data.c +64 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" /* * OMAP2430 hardware module integration data Loading @@ -33,6 +34,7 @@ static struct omap_hwmod omap2430_mpu_hwmod; static struct omap_hwmod omap2430_iva_hwmod; static struct omap_hwmod omap2430_l3_main_hwmod; static struct omap_hwmod omap2430_l4_core_hwmod; static struct omap_hwmod omap2430_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { Loading Loading @@ -165,12 +167,74 @@ static struct omap_hwmod omap2430_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { { .pa_start = 0x49016000, .pa_end = 0x4901607f, .flags = ADDR_TYPE_RT }, }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .master = &omap2430_l4_wkup_hwmod, .slave = &omap2430_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2430_wd_timer2_addrs, .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on * overflow condition */ static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { .rev_offs = 0x0, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { .name = "wd_timer", .sysc = &omap2430_wd_timer_sysc, }; /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { &omap2430_l4_wkup__wd_timer2, }; static struct omap_hwmod omap2430_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap2430_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .module_offs = WKUP_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, }, }, .slaves = omap2430_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; static __initdata struct omap_hwmod *omap2430_hwmods[] = { &omap2430_l3_main_hwmod, &omap2430_l4_core_hwmod, &omap2430_l4_wkup_hwmod, &omap2430_mpu_hwmod, &omap2430_iva_hwmod, &omap2430_wd_timer2_hwmod, NULL, }; Loading arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +66 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-34xx.h" #include "cm-regbits-34xx.h" /* * OMAP3xxx hardware module integration data Loading @@ -36,6 +37,7 @@ static struct omap_hwmod omap3xxx_iva_hwmod; static struct omap_hwmod omap3xxx_l3_main_hwmod; static struct omap_hwmod omap3xxx_l4_core_hwmod; static struct omap_hwmod omap3xxx_l4_per_hwmod; static struct omap_hwmod omap3xxx_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { Loading Loading @@ -197,6 +199,69 @@ static struct omap_hwmod omap3xxx_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { { .pa_start = 0x48314000, .pa_end = 0x4831407f, .flags = ADDR_TYPE_RT }, }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_wd_timer2_hwmod, .clk = "wdt2_ick", .addr = omap3xxx_wd_timer2_addrs, .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on * overflow condition */ static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = { .name = "wd_timer", .sysc = &omap3xxx_wd_timer_sysc, }; /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap3xxx_wd_timer2_slaves[] = { &omap3xxx_l4_wkup__wd_timer2, }; static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap3xxx_wd_timer_hwmod_class, .main_clk = "wdt2_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, .module_bit = OMAP3430_EN_WDT2_SHIFT, .module_offs = WKUP_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT, }, }, .slaves = omap3xxx_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l3_main_hwmod, &omap3xxx_l4_core_hwmod, Loading @@ -204,6 +269,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l4_wkup_hwmod, &omap3xxx_mpu_hwmod, &omap3xxx_iva_hwmod, &omap3xxx_wd_timer2_hwmod, NULL, }; Loading Loading
arch/arm/mach-omap1/devices.c +27 −0 Original line number Diff line number Diff line Loading @@ -232,3 +232,30 @@ static int __init omap1_init_devices(void) } arch_initcall(omap1_init_devices); #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) static struct resource wdt_resources[] = { { .start = 0xfffeb000, .end = 0xfffeb07F, .flags = IORESOURCE_MEM, }, }; static struct platform_device omap_wdt_device = { .name = "omap_wdt", .id = -1, .num_resources = ARRAY_SIZE(wdt_resources), .resource = wdt_resources, }; static int __init omap_init_wdt(void) { if (!cpu_is_omap16xx()) return; platform_device_register(&omap_wdt_device); return 0; } subsys_initcall(omap_init_wdt); #endif
arch/arm/mach-omap2/devices.c +39 −0 Original line number Diff line number Diff line Loading @@ -15,6 +15,7 @@ #include <linux/platform_device.h> #include <linux/io.h> #include <linux/clk.h> #include <linux/err.h> #include <mach/hardware.h> #include <mach/irqs.h> Loading @@ -28,6 +29,8 @@ #include <mach/gpio.h> #include <plat/mmc.h> #include <plat/dma.h> #include <plat/omap_hwmod.h> #include <plat/omap_device.h> #include "mux.h" Loading Loading @@ -932,3 +935,39 @@ static int __init omap2_init_devices(void) return 0; } arch_initcall(omap2_init_devices); #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) struct omap_device_pm_latency omap_wdt_latency[] = { [0] = { .deactivate_func = omap_device_idle_hwmods, .activate_func = omap_device_enable_hwmods, .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, }, }; static int __init omap_init_wdt(void) { int id = -1; struct omap_device *od; struct omap_hwmod *oh; char *oh_name = "wd_timer2"; char *dev_name = "omap_wdt"; if (!cpu_class_is_omap2()) return 0; oh = omap_hwmod_lookup(oh_name); if (!oh) { pr_err("Could not look up wd_timer%d hwmod\n", id); return -EINVAL; } od = omap_device_build(dev_name, id, oh, NULL, 0, omap_wdt_latency, ARRAY_SIZE(omap_wdt_latency), 0); WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", dev_name, oh->name); return 0; } subsys_initcall(omap_init_wdt); #endif
arch/arm/mach-omap2/omap_hwmod_2420_data.c +64 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" /* * OMAP2420 hardware module integration data Loading @@ -33,6 +34,7 @@ static struct omap_hwmod omap2420_mpu_hwmod; static struct omap_hwmod omap2420_iva_hwmod; static struct omap_hwmod omap2420_l3_main_hwmod; static struct omap_hwmod omap2420_l4_core_hwmod; static struct omap_hwmod omap2420_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2420_l3_main__l4_core = { Loading Loading @@ -165,12 +167,74 @@ static struct omap_hwmod omap2420_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { { .pa_start = 0x48022000, .pa_end = 0x4802207f, .flags = ADDR_TYPE_RT }, }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .master = &omap2420_l4_wkup_hwmod, .slave = &omap2420_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2420_wd_timer2_addrs, .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on * overflow condition */ static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { .name = "wd_timer", .sysc = &omap2420_wd_timer_sysc, }; /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { &omap2420_l4_wkup__wd_timer2, }; static struct omap_hwmod omap2420_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap2420_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .module_offs = WKUP_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, }, }, .slaves = omap2420_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; static __initdata struct omap_hwmod *omap2420_hwmods[] = { &omap2420_l3_main_hwmod, &omap2420_l4_core_hwmod, &omap2420_l4_wkup_hwmod, &omap2420_mpu_hwmod, &omap2420_iva_hwmod, &omap2420_wd_timer2_hwmod, NULL, }; Loading
arch/arm/mach-omap2/omap_hwmod_2430_data.c +64 −0 Original line number Diff line number Diff line Loading @@ -19,6 +19,7 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-24xx.h" #include "cm-regbits-24xx.h" /* * OMAP2430 hardware module integration data Loading @@ -33,6 +34,7 @@ static struct omap_hwmod omap2430_mpu_hwmod; static struct omap_hwmod omap2430_iva_hwmod; static struct omap_hwmod omap2430_l3_main_hwmod; static struct omap_hwmod omap2430_l4_core_hwmod; static struct omap_hwmod omap2430_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { Loading Loading @@ -165,12 +167,74 @@ static struct omap_hwmod omap2430_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) }; /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { { .pa_start = 0x49016000, .pa_end = 0x4901607f, .flags = ADDR_TYPE_RT }, }; static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { .master = &omap2430_l4_wkup_hwmod, .slave = &omap2430_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2430_wd_timer2_addrs, .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on * overflow condition */ static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { .rev_offs = 0x0, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { .name = "wd_timer", .sysc = &omap2430_wd_timer_sysc, }; /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { &omap2430_l4_wkup__wd_timer2, }; static struct omap_hwmod omap2430_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap2430_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, .module_offs = WKUP_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, }, }, .slaves = omap2430_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), }; static __initdata struct omap_hwmod *omap2430_hwmods[] = { &omap2430_l3_main_hwmod, &omap2430_l4_core_hwmod, &omap2430_l4_wkup_hwmod, &omap2430_mpu_hwmod, &omap2430_iva_hwmod, &omap2430_wd_timer2_hwmod, NULL, }; Loading
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +66 −0 Original line number Diff line number Diff line Loading @@ -21,6 +21,7 @@ #include "omap_hwmod_common_data.h" #include "prm-regbits-34xx.h" #include "cm-regbits-34xx.h" /* * OMAP3xxx hardware module integration data Loading @@ -36,6 +37,7 @@ static struct omap_hwmod omap3xxx_iva_hwmod; static struct omap_hwmod omap3xxx_l3_main_hwmod; static struct omap_hwmod omap3xxx_l4_core_hwmod; static struct omap_hwmod omap3xxx_l4_per_hwmod; static struct omap_hwmod omap3xxx_wd_timer2_hwmod; /* L3 -> L4_CORE interface */ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = { Loading Loading @@ -197,6 +199,69 @@ static struct omap_hwmod omap3xxx_iva_hwmod = { .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }; /* l4_wkup -> wd_timer2 */ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { { .pa_start = 0x48314000, .pa_end = 0x4831407f, .flags = ADDR_TYPE_RT }, }; static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { .master = &omap3xxx_l4_wkup_hwmod, .slave = &omap3xxx_wd_timer2_hwmod, .clk = "wdt2_ick", .addr = omap3xxx_wd_timer2_addrs, .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* * 'wd_timer' class * 32-bit watchdog upward counter that generates a pulse on the reset pin on * overflow condition */ static struct omap_hwmod_class_sysconfig omap3xxx_wd_timer_sysc = { .rev_offs = 0x0000, .sysc_offs = 0x0010, .syss_offs = 0x0014, .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_EMUFREE | SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY), .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), .sysc_fields = &omap_hwmod_sysc_type1, }; static struct omap_hwmod_class omap3xxx_wd_timer_hwmod_class = { .name = "wd_timer", .sysc = &omap3xxx_wd_timer_sysc, }; /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap3xxx_wd_timer2_slaves[] = { &omap3xxx_l4_wkup__wd_timer2, }; static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { .name = "wd_timer2", .class = &omap3xxx_wd_timer_hwmod_class, .main_clk = "wdt2_fck", .prcm = { .omap2 = { .prcm_reg_id = 1, .module_bit = OMAP3430_EN_WDT2_SHIFT, .module_offs = WKUP_MOD, .idlest_reg_id = 1, .idlest_idle_bit = OMAP3430_ST_WDT2_SHIFT, }, }, .slaves = omap3xxx_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_slaves), .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l3_main_hwmod, &omap3xxx_l4_core_hwmod, Loading @@ -204,6 +269,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = { &omap3xxx_l4_wkup_hwmod, &omap3xxx_mpu_hwmod, &omap3xxx_iva_hwmod, &omap3xxx_wd_timer2_hwmod, NULL, }; Loading