Commit 962b9a3a authored Jun 04, 2015 by Arun Menon

msm: vidc: Always de-assert and assert video_core_clk

As part of the Venus GDSC workaround for MDP on V2, video driver
de-asserts/asserts the video core clk during regulator enable/disable.
Suppose the first video session starts and completes when MDP is awake,
then video driver will assert the core clk when firmware is unloaded.
If a new video session starts after MDP has gone to sleep, then MDP is
no longer voting for venus gdsc and hence video driver does not
de-assert the core clock. Due to this, video core clk does not get enabled
even after regulator is turned ON. Consequently any venus register
read/write will result in unclocked access and crash the device. This
patch ensures that video core clk is always de-asserted prior to
clk_enable.

Change-Id: I2d412b912946d296e3f1120288ff4c77260209a0
Signed-off-by: Arun Menon <avmenon@codeaurora.org>

parent 58d6bfbe

drivers/media/platform/msm/vidc/venus_hfi.c

+21 −23

Original line number	Diff line number	Diff line
		@@ -4076,12 +4076,11 @@ static int __core_clk_reset(struct venus_hfi_device *device,
		if (!rinfo)
		return -EINVAL;

		if (regulator_is_enabled(rinfo->regulator)) {
		/*
		* This is a workaround for msm8996 V2, because MDP enables
		* Venus GDSC. Due to MDP's vote on Venus GDSC, some of Venus
		* registers are not cleared after firmware is unloaded. This
		* causes subsequent video sessions to fail. By reseting
		* causes subsequent video sessions to fail. By resetting
		* core_clk we are forcing a hard reset and ensure each
		* firmware load starts on a clean slate.
		*/
		@@ -4100,7 +4099,6 @@ static int __core_clk_reset(struct venus_hfi_device *device,
		return -EINVAL;
		}
		udelay(1);
		}
		return rc;
		}