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Commit 961ebea4 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

Merge tag 'ras_queue_for_3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras into x86/mce 



Pull MCE changes from Borislav Petkov:

 " Patch 1/2 which enables MCA by default because I still see bugreports
   where CONFIG_X86_MCE is disabled and this is a bad idea so turning it on
   by default makes sense to me. The second one is a trivial cleanup. "

Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parents f1f65244 57639bed

arch/x86/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -871,6 +871,7 @@ config X86_REROUTE_FOR_BROKEN_BOOT_IRQS 


config X86_MCE

	bool "Machine Check / overheating reporting"

	default y

	---help---

	  Machine Check support allows the processor to notify the

	  kernel if it detects a problem (e.g. overheating, data corruption).

arch/x86/include/asm/mce.h

+1 −11
Original line number Diff line number Diff line
@@ -116,19 +116,9 @@ struct mce_log { 
/* Software defined banks */

#define MCE_EXTENDED_BANK	128

#define MCE_THERMAL_BANK	MCE_EXTENDED_BANK + 0



#define K8_MCE_THRESHOLD_BASE      (MCE_EXTENDED_BANK + 1)      /* MCE_AMD */

#define K8_MCE_THRESHOLD_BANK_0    (MCE_THRESHOLD_BASE + 0 * 9)

#define K8_MCE_THRESHOLD_BANK_1    (MCE_THRESHOLD_BASE + 1 * 9)

#define K8_MCE_THRESHOLD_BANK_2    (MCE_THRESHOLD_BASE + 2 * 9)

#define K8_MCE_THRESHOLD_BANK_3    (MCE_THRESHOLD_BASE + 3 * 9)

#define K8_MCE_THRESHOLD_BANK_4    (MCE_THRESHOLD_BASE + 4 * 9)

#define K8_MCE_THRESHOLD_BANK_5    (MCE_THRESHOLD_BASE + 5 * 9)

#define K8_MCE_THRESHOLD_DRAM_ECC  (MCE_THRESHOLD_BANK_4 + 0)



#define K8_MCE_THRESHOLD_BASE      (MCE_EXTENDED_BANK + 1)



#ifdef __KERNEL__



extern void mce_register_decode_chain(struct notifier_block *nb);

extern void mce_unregister_decode_chain(struct notifier_block *nb);