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Commit 94712927 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull sound fixes from Takashi Iwai:
 "Although the diffstat looks scary, it's just because of the removal of
  the dead code (s6000), thus it must not affect anything serious.

  Other than that, all small fixes.  The only core fix is zero-clear for
  a PCM compat ioctl.  The rest are driver-specific, bebob, sgtl500,
  adau1761, intel-sst, ad1889 and a few HD-audio quirks as usual"

* tag 'sound-3.18-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ALSA: hda - Add workaround for CMI8888 snoop behavior
  ALSA: pcm: Zero-clear reserved fields of PCM status ioctl in compat mode
  ALSA: bebob: Uninitialized id returned by saffirepro_both_clk_src_get
  ALSA: hda/realtek - New SSID for Headset quirk
  ALSA: ad1889: Fix probable mask then right shift defects
  ALSA: bebob: fix wrong decoding of clock information for Terratec PHASE 88 Rack FW
  ALSA: hda/realtek - Update restore default value for ALC283
  ALSA: hda/realtek - Update restore default value for ALC282
  ASoC: fsl: use strncpy() to prevent copying of over-long names
  ASoC: adau1761: Fix input PGA volume
  ASoC: s6000: remove driver
  ASoC: Intel: HSW/BDW only support S16 and S24 formats.
  ASoC: sgtl500: Document the required supplies
parents a7ca10f2 3b70bdba
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+10 −0
Original line number Diff line number Diff line
@@ -7,10 +7,20 @@ Required properties:

- clocks : the clock provider of SYS_MCLK

- VDDA-supply : the regulator provider of VDDA

- VDDIO-supply: the regulator provider of VDDIO

Optional properties:

- VDDD-supply : the regulator provider of VDDD

Example:

codec: sgtl5000@0a {
	compatible = "fsl,sgtl5000";
	reg = <0x0a>;
	clocks = <&clks 150>;
	VDDA-supply = <&reg_3p3v>;
	VDDIO-supply = <&reg_3p3v>;
};
+2 −0
Original line number Diff line number Diff line
@@ -210,6 +210,8 @@ static int snd_pcm_status_user_compat(struct snd_pcm_substream *substream,
	if (err < 0)
		return err;

	if (clear_user(src, sizeof(*src)))
		return -EFAULT;
	if (put_user(status.state, &src->state) ||
	    compat_put_timespec(&status.trigger_tstamp, &src->trigger_tstamp) ||
	    compat_put_timespec(&status.tstamp, &src->tstamp) ||
+48 −14
Original line number Diff line number Diff line
@@ -27,12 +27,14 @@
#define SAFFIRE_CLOCK_SOURCE_INTERNAL		0
#define SAFFIRE_CLOCK_SOURCE_SPDIF		1

/* '1' is absent, why... */
/* clock sources as returned from register of Saffire Pro 10 and 26 */
#define SAFFIREPRO_CLOCK_SOURCE_INTERNAL	0
#define SAFFIREPRO_CLOCK_SOURCE_SKIP		1 /* never used on hardware */
#define SAFFIREPRO_CLOCK_SOURCE_SPDIF		2
#define SAFFIREPRO_CLOCK_SOURCE_ADAT1		3
#define SAFFIREPRO_CLOCK_SOURCE_ADAT2		4
#define SAFFIREPRO_CLOCK_SOURCE_ADAT1		3 /* not used on s.pro. 10 */
#define SAFFIREPRO_CLOCK_SOURCE_ADAT2		4 /* not used on s.pro. 10 */
#define SAFFIREPRO_CLOCK_SOURCE_WORDCLOCK	5
#define SAFFIREPRO_CLOCK_SOURCE_COUNT		6

/* S/PDIF, ADAT1, ADAT2 is enabled or not. three quadlets */
#define SAFFIREPRO_ENABLE_DIG_IFACES		0x01a4
@@ -101,13 +103,34 @@ saffire_write_quad(struct snd_bebob *bebob, u64 offset, u32 value)
				  &data, sizeof(__be32), 0);
}

static char *const saffirepro_10_clk_src_labels[] = {
	SND_BEBOB_CLOCK_INTERNAL, "S/PDIF", "Word Clock"
};
static char *const saffirepro_26_clk_src_labels[] = {
	SND_BEBOB_CLOCK_INTERNAL, "S/PDIF", "ADAT1", "ADAT2", "Word Clock"
};

static char *const saffirepro_10_clk_src_labels[] = {
	SND_BEBOB_CLOCK_INTERNAL, "S/PDIF", "Word Clock"
/* Value maps between registers and labels for SaffirePro 10/26. */
static const signed char saffirepro_clk_maps[][SAFFIREPRO_CLOCK_SOURCE_COUNT] = {
	/* SaffirePro 10 */
	[0] = {
		[SAFFIREPRO_CLOCK_SOURCE_INTERNAL]  =  0,
		[SAFFIREPRO_CLOCK_SOURCE_SKIP]      = -1, /* not supported */
		[SAFFIREPRO_CLOCK_SOURCE_SPDIF]     =  1,
		[SAFFIREPRO_CLOCK_SOURCE_ADAT1]     = -1, /* not supported */
		[SAFFIREPRO_CLOCK_SOURCE_ADAT2]     = -1, /* not supported */
		[SAFFIREPRO_CLOCK_SOURCE_WORDCLOCK] =  2,
	},
	/* SaffirePro 26 */
	[1] = {
		[SAFFIREPRO_CLOCK_SOURCE_INTERNAL]  =  0,
		[SAFFIREPRO_CLOCK_SOURCE_SKIP]      = -1, /* not supported */
		[SAFFIREPRO_CLOCK_SOURCE_SPDIF]     =  1,
		[SAFFIREPRO_CLOCK_SOURCE_ADAT1]     =  2,
		[SAFFIREPRO_CLOCK_SOURCE_ADAT2]     =  3,
		[SAFFIREPRO_CLOCK_SOURCE_WORDCLOCK] =  4,
	}
};

static int
saffirepro_both_clk_freq_get(struct snd_bebob *bebob, unsigned int *rate)
{
@@ -138,24 +161,35 @@ saffirepro_both_clk_freq_set(struct snd_bebob *bebob, unsigned int rate)

	return saffire_write_quad(bebob, SAFFIREPRO_RATE_NOREBOOT, id);
}

/*
 * query hardware for current clock source, return our internally
 * used clock index in *id, depending on hardware.
 */
static int
saffirepro_both_clk_src_get(struct snd_bebob *bebob, unsigned int *id)
{
	int err;
	u32 value;
	u32 value;       /* clock source read from hw register */
	const signed char *map;

	err = saffire_read_quad(bebob, SAFFIREPRO_OFFSET_CLOCK_SOURCE, &value);
	if (err < 0)
		goto end;

	if (bebob->spec->clock->labels == saffirepro_10_clk_src_labels) {
		if (value == SAFFIREPRO_CLOCK_SOURCE_WORDCLOCK)
			*id = 2;
		else if (value == SAFFIREPRO_CLOCK_SOURCE_SPDIF)
			*id = 1;
	} else if (value > 1) {
		*id = value - 1;
	/* depending on hardware, use a different mapping */
	if (bebob->spec->clock->labels == saffirepro_10_clk_src_labels)
		map = saffirepro_clk_maps[0];
	else
		map = saffirepro_clk_maps[1];

	/* In a case that this driver cannot handle the value of register. */
	if (value >= SAFFIREPRO_CLOCK_SOURCE_COUNT || map[value] < 0) {
		err = -EIO;
		goto end;
	}

	*id = (unsigned int)map[value];
end:
	return err;
}
+15 −3
Original line number Diff line number Diff line
@@ -129,12 +129,24 @@ snd_bebob_stream_check_internal_clock(struct snd_bebob *bebob, bool *internal)
	/* 1.The device has its own operation to switch source of clock */
	if (clk_spec) {
		err = clk_spec->get(bebob, &id);
		if (err < 0)
		if (err < 0) {
			dev_err(&bebob->unit->device,
				"fail to get clock source: %d\n", err);
		else if (strncmp(clk_spec->labels[id], SND_BEBOB_CLOCK_INTERNAL,
			goto end;
		}

		if (id >= clk_spec->num) {
			dev_err(&bebob->unit->device,
				"clock source %d out of range 0..%d\n",
				id, clk_spec->num - 1);
			err = -EIO;
			goto end;
		}

		if (strncmp(clk_spec->labels[id], SND_BEBOB_CLOCK_INTERNAL,
			    strlen(SND_BEBOB_CLOCK_INTERNAL)) == 0)
			*internal = true;

		goto end;
	}

+6 −1
Original line number Diff line number Diff line
@@ -24,7 +24,12 @@ phase88_rack_clk_src_get(struct snd_bebob *bebob, unsigned int *id)
	if (err < 0)
		goto end;

	*id = (enable_ext & 0x01) | ((enable_word & 0x01) << 1);
	if (enable_ext == 0)
		*id = 0;
	else if (enable_word == 0)
		*id = 1;
	else
		*id = 2;
end:
	return err;
}
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