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Commit 93bd8649 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
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drm/i915: Put the mm in the parent address space



Every address space should support object allocation. It therefore makes
sense to have the allocator be part of the "superclass" which GGTT and
PPGTT will derive.

Since our maximum address space size is only 2GB we're not yet able to
avoid doing allocation/eviction; but we'd hope one day this becomes
almost irrelvant.

v2: Rebased

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 853ba5d2
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+2 −2
Original line number Diff line number Diff line
@@ -1358,7 +1358,7 @@ cleanup_gem:
	i915_gem_context_fini(dev);
	mutex_unlock(&dev->struct_mutex);
	i915_gem_cleanup_aliasing_ppgtt(dev);
	drm_mm_takedown(&dev_priv->mm.gtt_space);
	drm_mm_takedown(&dev_priv->gtt.base.mm);
cleanup_irq:
	drm_irq_uninstall(dev);
cleanup_gem_stolen:
@@ -1758,7 +1758,7 @@ int i915_driver_unload(struct drm_device *dev)
			i915_free_hws(dev);
	}

	drm_mm_takedown(&dev_priv->mm.gtt_space);
	drm_mm_takedown(&dev_priv->gtt.base.mm);
	if (dev_priv->regs != NULL)
		pci_iounmap(dev->pdev, dev_priv->regs);

+1 −2
Original line number Diff line number Diff line
@@ -447,6 +447,7 @@ enum i915_cache_level {
typedef uint32_t gen6_gtt_pte_t;

struct i915_address_space {
	struct drm_mm mm;
	struct drm_device *dev;
	unsigned long start;		/* Start offset always 0 for dri2 */
	size_t total;		/* size addr space maps (ex. 2GB for ggtt) */
@@ -831,8 +832,6 @@ struct intel_l3_parity {
struct i915_gem_mm {
	/** Memory allocator for GTT stolen memory */
	struct drm_mm stolen;
	/** Memory allocator for GTT */
	struct drm_mm gtt_space;
	/** List of all objects in gtt_space. Used to restore gtt
	 * mappings on resume */
	struct list_head bound_list;
+1 −1
Original line number Diff line number Diff line
@@ -3121,7 +3121,7 @@ i915_gem_object_bind_to_gtt(struct drm_i915_gem_object *obj,
	i915_gem_object_pin_pages(obj);

search_free:
	ret = drm_mm_insert_node_in_range_generic(&dev_priv->mm.gtt_space,
	ret = drm_mm_insert_node_in_range_generic(&dev_priv->gtt.base.mm,
						  &obj->gtt_space,
						  size, alignment,
						  obj->cache_level, 0, gtt_max);
+5 −5
Original line number Diff line number Diff line
@@ -78,12 +78,12 @@ i915_gem_evict_something(struct drm_device *dev, int min_size,

	INIT_LIST_HEAD(&unwind_list);
	if (mappable)
		drm_mm_init_scan_with_range(&dev_priv->mm.gtt_space,
					    min_size, alignment, cache_level,
					    0, dev_priv->gtt.mappable_end);
		drm_mm_init_scan_with_range(&dev_priv->gtt.base.mm, min_size,
					    alignment, cache_level, 0,
					    dev_priv->gtt.mappable_end);
	else
		drm_mm_init_scan(&dev_priv->mm.gtt_space,
				 min_size, alignment, cache_level);
		drm_mm_init_scan(&dev_priv->gtt.base.mm, min_size, alignment,
				 cache_level);

	/* First see if there is a large enough contiguous idle region... */
	list_for_each_entry(obj, &dev_priv->mm.inactive_list, mm_list) {
+11 −6
Original line number Diff line number Diff line
@@ -269,6 +269,8 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
		container_of(vm, struct i915_hw_ppgtt, base);
	int i;

	drm_mm_takedown(&ppgtt->base.mm);

	if (ppgtt->pt_dma_addr) {
		for (i = 0; i < ppgtt->num_pd_entries; i++)
			pci_unmap_page(ppgtt->base.dev->pdev,
@@ -382,8 +384,11 @@ static int i915_gem_init_aliasing_ppgtt(struct drm_device *dev)

	if (ret)
		kfree(ppgtt);
	else
	else {
		dev_priv->mm.aliasing_ppgtt = ppgtt;
		drm_mm_init(&ppgtt->base.mm, ppgtt->base.start,
			    ppgtt->base.total);
	}

	return ret;
}
@@ -651,9 +656,9 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
	BUG_ON(mappable_end > end);

	/* Subtract the guard page ... */
	drm_mm_init(&dev_priv->mm.gtt_space, start, end - start - PAGE_SIZE);
	drm_mm_init(&dev_priv->gtt.base.mm, start, end - start - PAGE_SIZE);
	if (!HAS_LLC(dev))
		dev_priv->mm.gtt_space.color_adjust = i915_gtt_color_adjust;
		dev_priv->gtt.base.mm.color_adjust = i915_gtt_color_adjust;

	/* Mark any preallocated objects as occupied */
	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
@@ -662,7 +667,7 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
			      i915_gem_obj_ggtt_offset(obj), obj->base.size);

		WARN_ON(i915_gem_obj_ggtt_bound(obj));
		ret = drm_mm_reserve_node(&dev_priv->mm.gtt_space,
		ret = drm_mm_reserve_node(&dev_priv->gtt.base.mm,
					  &obj->gtt_space);
		if (ret)
			DRM_DEBUG_KMS("Reservation failed\n");
@@ -673,7 +678,7 @@ void i915_gem_setup_global_gtt(struct drm_device *dev,
	dev_priv->gtt.base.total = end - start;

	/* Clear any non-preallocated blocks */
	drm_mm_for_each_hole(entry, &dev_priv->mm.gtt_space,
	drm_mm_for_each_hole(entry, &dev_priv->gtt.base.mm,
			     hole_start, hole_end) {
		const unsigned long count = (hole_end - hole_start) / PAGE_SIZE;
		DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
@@ -727,7 +732,7 @@ void i915_gem_init_global_gtt(struct drm_device *dev)
			return;

		DRM_ERROR("Aliased PPGTT setup failed %d\n", ret);
		drm_mm_takedown(&dev_priv->mm.gtt_space);
		drm_mm_takedown(&dev_priv->gtt.base.mm);
		gtt_size += GEN6_PPGTT_PD_ENTRIES * PAGE_SIZE;
	}
	i915_gem_setup_global_gtt(dev, 0, mappable_size, gtt_size);
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