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Commit 93bc11c3 authored by Rafael J. Wysocki's avatar Rafael J. Wysocki
Browse files

Merge branch 'pm-cpuidle' 

* pm-cpuidle:
  cpuidle: Fix ARCH_NEEDS_CPU_IDLE_COUPLED dependency warning
  cpuidle: Comment the driver's framework code
  cpuidle: simplify multiple driver support
  ARM: zynq: Add cpuidle support
  cpuidle: improve governor Kconfig options
parents 3e79a8a6 b39b0981

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -1311,6 +1311,7 @@ W: http://wiki.xilinx.com 
T:	git git://git.xilinx.com/linux-xlnx.git

S:	Supported

F:	arch/arm/mach-zynq/

F:	drivers/cpuidle/cpuidle-zynq.c



ARM64 PORT (AARCH64 ARCHITECTURE)

M:	Catalin Marinas <catalin.marinas@arm.com>

drivers/cpuidle/Kconfig

+16 −11
Original line number Diff line number Diff line 


config CPU_IDLE

menuconfig CPU_IDLE

	bool "CPU idle PM support"

	default y if ACPI || PPC_PSERIES

	select CPU_IDLE_GOV_LADDER if (!NO_HZ && !NO_HZ_IDLE)

	select CPU_IDLE_GOV_MENU if (NO_HZ || NO_HZ_IDLE)

	help

	  CPU idle is a generic framework for supporting software-controlled

	  idle processor power management.  It includes modular cross-platform
@@ -9,9 +11,10 @@ config CPU_IDLE 


	  If you're using an ACPI-enabled platform, you should say Y here.



if CPU_IDLE



config CPU_IDLE_MULTIPLE_DRIVERS

        bool "Support multiple cpuidle drivers"

        depends on CPU_IDLE

        default n

        help

         Allows the cpuidle framework to use different drivers for each CPU.
@@ -19,24 +22,26 @@ config CPU_IDLE_MULTIPLE_DRIVERS 
         states. If unsure say N.



config CPU_IDLE_GOV_LADDER

	bool

	depends on CPU_IDLE

	bool "Ladder governor (for periodic timer tick)"

	default y



config CPU_IDLE_GOV_MENU

	bool

	depends on CPU_IDLE && NO_HZ

	bool "Menu governor (for tickless system)"

	default y



config ARCH_NEEDS_CPU_IDLE_COUPLED

	def_bool n



if CPU_IDLE



config CPU_IDLE_CALXEDA

	bool "CPU Idle Driver for Calxeda processors"

	depends on ARCH_HIGHBANK

	help

	  Select this to enable cpuidle on Calxeda processors.



config CPU_IDLE_ZYNQ

	bool "CPU Idle Driver for Xilinx Zynq processors"

	depends on ARCH_ZYNQ

	help

	  Select this to enable cpuidle on Xilinx Zynq processors.



endif



config ARCH_NEEDS_CPU_IDLE_COUPLED

	def_bool n

drivers/cpuidle/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -7,3 +7,4 @@ obj-$(CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED) += coupled.o 


obj-$(CONFIG_CPU_IDLE_CALXEDA) += cpuidle-calxeda.o

obj-$(CONFIG_ARCH_KIRKWOOD) += cpuidle-kirkwood.o

obj-$(CONFIG_CPU_IDLE_ZYNQ) += cpuidle-zynq.o

drivers/cpuidle/cpuidle-zynq.c

0 → 100644
+83 −0
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2012-2013 Xilinx

 *

 * CPU idle support for Xilinx Zynq

 *

 * based on arch/arm/mach-at91/cpuidle.c

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 *

 * You should have received a copy of the GNU General Public License along with

 * this program.  If not, see <http://www.gnu.org/licenses/>.

 *

 * The cpu idle uses wait-for-interrupt and RAM self refresh in order

 * to implement two idle states -

 * #1 wait-for-interrupt

 * #2 wait-for-interrupt and RAM self refresh

 *

 * Maintainer: Michal Simek <michal.simek@xilinx.com>

 */



#include <linux/init.h>

#include <linux/cpu_pm.h>

#include <linux/cpuidle.h>

#include <linux/of.h>

#include <asm/proc-fns.h>

#include <asm/cpuidle.h>



#define ZYNQ_MAX_STATES		2



/* Actual code that puts the SoC in different idle states */

static int zynq_enter_idle(struct cpuidle_device *dev,

			   struct cpuidle_driver *drv, int index)

{

	/* Devices must be stopped here */

	cpu_pm_enter();



	/* Add code for DDR self refresh start */

	cpu_do_idle();



	/* Add code for DDR self refresh stop */

	cpu_pm_exit();



	return index;

}



static struct cpuidle_driver zynq_idle_driver = {

	.name = "zynq_idle",

	.owner = THIS_MODULE,

	.states = {

		ARM_CPUIDLE_WFI_STATE,

		{

			.enter			= zynq_enter_idle,

			.exit_latency		= 10,

			.target_residency	= 10000,

			.flags			= CPUIDLE_FLAG_TIME_VALID |

						  CPUIDLE_FLAG_TIMER_STOP,

			.name			= "RAM_SR",

			.desc			= "WFI and RAM Self Refresh",

		},

	},

	.safe_state_index = 0,

	.state_count = ZYNQ_MAX_STATES,

};



/* Initialize CPU idle by registering the idle states */

static int __init zynq_cpuidle_init(void)

{

	if (!of_machine_is_compatible("xlnx,zynq-7000"))

		return -ENODEV;



	pr_info("Xilinx Zynq CpuIdle Driver started\n");



	return cpuidle_register(&zynq_idle_driver, NULL);

}



device_initcall(zynq_cpuidle_init);

drivers/cpuidle/cpuidle.c

+2 −2
Original line number Diff line number Diff line
@@ -466,7 +466,7 @@ void cpuidle_unregister(struct cpuidle_driver *drv) 
	int cpu;

	struct cpuidle_device *device;



	for_each_possible_cpu(cpu) {

	for_each_cpu(cpu, drv->cpumask) {

		device = &per_cpu(cpuidle_dev, cpu);

		cpuidle_unregister_device(device);

	}
@@ -498,7 +498,7 @@ int cpuidle_register(struct cpuidle_driver *drv, 
		return ret;

	}



	for_each_possible_cpu(cpu) {

	for_each_cpu(cpu, drv->cpumask) {

		device = &per_cpu(cpuidle_dev, cpu);

		device->cpu = cpu;