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Commit 9355e59c authored by Steven J. Hill's avatar Steven J. Hill Committed by Ralf Baechle
Browse files

MIPS: microMIPS: mfhc1 & mthc1 support for the FPU emulator 



This patch adds support for microMIPS encodings of the mfhc1 & mthc1
instructions introduced in release 2 of the mips32 & mips64
architectures, converting them to their mips32 equivalents for the FPU
emulator.

Signed-off-by: default avatarSteven J. Hill <Steven.Hill@imgtec.com>
Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6110/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 1ac94400

arch/mips/include/uapi/asm/inst.h

+2 −0
Original line number Diff line number Diff line
@@ -398,8 +398,10 @@ enum mm_32f_73_minor_op { 
	mm_movt1_op = 0xa5,

	mm_ftruncw_op = 0xac,

	mm_fneg1_op = 0xad,

	mm_mfhc1_op = 0xc0,

	mm_froundl_op = 0xcc,

	mm_fcvtd1_op = 0xcd,

	mm_mthc1_op = 0xe0,

	mm_froundw_op = 0xec,

	mm_fcvts1_op = 0xed,

};

arch/mips/math-emu/cp1emu.c

+7 −1
Original line number Diff line number Diff line
@@ -417,14 +417,20 @@ static int microMIPS32_to_MIPS32(union mips_instruction *insn_ptr) 
			case mm_mtc1_op:

			case mm_cfc1_op:

			case mm_ctc1_op:

			case mm_mfhc1_op:

			case mm_mthc1_op:

				if (insn.mm_fp1_format.op == mm_mfc1_op)

					op = mfc_op;

				else if (insn.mm_fp1_format.op == mm_mtc1_op)

					op = mtc_op;

				else if (insn.mm_fp1_format.op == mm_cfc1_op)

					op = cfc_op;

				else

				else if (insn.mm_fp1_format.op == mm_ctc1_op)

					op = ctc_op;

				else if (insn.mm_fp1_format.op == mm_mfhc1_op)

					op = mfhc_op;

				else

					op = mthc_op;

				mips32_insn.fp1_format.opcode = cop1_op;

				mips32_insn.fp1_format.op = op;

				mips32_insn.fp1_format.rt =