Merge "ARM: dts: msm: Add 64bit DMA mask support for ipa3 on msmcobalt" (926c5ca9) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/platform/msm/ipa.txt

+4 −2

Original line number	Diff line number	Diff line
		@@ -57,6 +57,8 @@ memory allocation over a PCIe bridge
		a pipe reset via the IPA uC is required
		- qcom,ipa-wdi2: Boolean context flag to indicate whether
		using wdi-2.0 or not
		- qcom,use-64-bit-dma-mask: Boolean context flag to indicate whether
		using 64bit dma mask or not
		- qcom,use-dma-zone: Boolean context flag to indicate whether memory
		allocations controlled by IPA driver that do not
		specify a struct device * should use GFP_DMA to

arch/arm/boot/dts/qcom/msmcobalt.dtsi

+1 −0

Original line number	Diff line number	Diff line
		@@ -830,6 +830,7 @@
		qcom,modem-cfg-emb-pipe-flt;
		qcom,do-not-use-ch-gsi-20;
		qcom,ipa-wdi2;
		qcom,use-64-bit-dma-mask;
		clock-names = "core_clk";
		clocks = <&clock_gcc clk_ipa_clk>;
		qcom,msm-bus,name = "ipa";

drivers/platform/msm/ipa/ipa_v3/ipa.c

+46 −12

Original line number	Diff line number	Diff line
		@@ -4014,6 +4014,7 @@ static int ipa3_pre_init(const struct ipa3_plat_drv_res *resource_p,
		ipa3_ctx->ipa_bam_remote_mode = resource_p->ipa_bam_remote_mode;
		ipa3_ctx->modem_cfg_emb_pipe_flt = resource_p->modem_cfg_emb_pipe_flt;
		ipa3_ctx->ipa_wdi2 = resource_p->ipa_wdi2;
		ipa3_ctx->use_64_bit_dma_mask = resource_p->use_64_bit_dma_mask;
		ipa3_ctx->wan_rx_ring_size = resource_p->wan_rx_ring_size;
		ipa3_ctx->skip_uc_pipe_reset = resource_p->skip_uc_pipe_reset;
		ipa3_ctx->tethered_flow_control = resource_p->tethered_flow_control;
		@@ -4519,6 +4520,7 @@ static int get_ipa_dts_configuration(struct platform_device *pdev,
		ipa_drv_res->ipa_bam_remote_mode = false;
		ipa_drv_res->modem_cfg_emb_pipe_flt = false;
		ipa_drv_res->ipa_wdi2 = false;
		ipa_drv_res->use_64_bit_dma_mask = false;
		ipa_drv_res->wan_rx_ring_size = IPA_GENERIC_RX_POOL_SZ;
		ipa_drv_res->apply_rg10_wa = false;
		ipa_drv_res->gsi_ch20_wa = false;
		@@ -4587,6 +4589,13 @@ static int get_ipa_dts_configuration(struct platform_device *pdev,
		ipa_drv_res->ipa_wdi2
		? "True" : "False");

		ipa_drv_res->use_64_bit_dma_mask =
		of_property_read_bool(pdev->dev.of_node,
		"qcom,use-64-bit-dma-mask");
		IPADBG(": use_64_bit_dma_mask = %s\n",
		ipa_drv_res->use_64_bit_dma_mask
		? "True" : "False");

		ipa_drv_res->skip_uc_pipe_reset =
		of_property_read_bool(pdev->dev.of_node,
		"qcom,skip-uc-pipe-reset");
		@@ -4815,12 +4824,19 @@ static int ipa_smmu_uc_cb_probe(struct device *dev)
		cb->va_end = cb->va_start + cb->va_size;
		IPADBG("UC va_start=0x%x va_sise=0x%x\n", cb->va_start, cb->va_size);

		if (ipa3_ctx->use_64_bit_dma_mask) {
		if (dma_set_mask(dev, DMA_BIT_MASK(64)) \|\|
		dma_set_coherent_mask(dev, DMA_BIT_MASK(64))) {
		IPAERR("DMA set 64bit mask failed\n");
		return -EOPNOTSUPP;
		}
		} else {
		if (dma_set_mask(dev, DMA_BIT_MASK(32)) \|\|
		dma_set_coherent_mask(dev, DMA_BIT_MASK(32))) {
		IPAERR("DMA set mask failed\n");
		IPAERR("DMA set 32bit mask failed\n");
		return -EOPNOTSUPP;
		}

		}
		IPADBG("UC CB PROBE=%p create IOMMU mapping\n", dev);

		cb->dev = dev;
		@@ -4919,11 +4935,19 @@ static int ipa_smmu_ap_cb_probe(struct device *dev)
		cb->va_end = cb->va_start + cb->va_size;
		IPADBG("AP va_start=0x%x va_sise=0x%x\n", cb->va_start, cb->va_size);

		if (ipa3_ctx->use_64_bit_dma_mask) {
		if (dma_set_mask(dev, DMA_BIT_MASK(64)) \|\|
		dma_set_coherent_mask(dev, DMA_BIT_MASK(64))) {
		IPAERR("DMA set 64bit mask failed\n");
		return -EOPNOTSUPP;
		}
		} else {
		if (dma_set_mask(dev, DMA_BIT_MASK(32)) \|\|
		dma_set_coherent_mask(dev, DMA_BIT_MASK(32))) {
		IPAERR("DMA set mask failed\n");
		IPAERR("DMA set 32bit mask failed\n");
		return -EOPNOTSUPP;
		}
		}

		cb->dev = dev;
		cb->mapping = arm_iommu_create_mapping(msm_iommu_get_bus(dev),
		@@ -5127,14 +5151,24 @@ int ipa3_plat_drv_probe(struct platform_device *pdev_p,
		"qcom,msm-smmu")) {
		IPAERR("Legacy IOMMU not supported\n");
		result = -EOPNOTSUPP;
		} else {
		if (of_property_read_bool(pdev_p->dev.of_node,
		"qcom,use-64-bit-dma-mask")) {
		if (dma_set_mask(&pdev_p->dev, DMA_BIT_MASK(64)) \|\|
		dma_set_coherent_mask(&pdev_p->dev,
		DMA_BIT_MASK(64))) {
		IPAERR("DMA set 64bit mask failed\n");
		return -EOPNOTSUPP;
		}
		} else {
		if (dma_set_mask(&pdev_p->dev, DMA_BIT_MASK(32)) \|\|
		dma_set_coherent_mask(&pdev_p->dev,
		DMA_BIT_MASK(32))) {
		IPAERR("DMA set mask failed\n");
		IPAERR("DMA set 32bit mask failed\n");
		return -EOPNOTSUPP;
		}
		}
		}

		if (!ipa3_bus_scale_table)
		ipa3_bus_scale_table = msm_bus_cl_get_pdata(pdev_p);

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -1327,6 +1327,7 @@ struct ipa3_ready_cb_info {
		* @logbuf: ipc log buffer for high priority messages
		* @logbuf_low: ipc log buffer for low priority messages
		* @ipa_wdi2: using wdi-2.0
		* @use_64_bit_dma_mask: using 64bits dma mask
		* @ipa_bus_hdl: msm driver handle for the data path bus
		* @ctrl: holds the core specific operations based on
		* core version (vtable like)
		@@ -1426,6 +1427,7 @@ struct ipa3_context {
		bool ipa_bam_remote_mode;
		bool modem_cfg_emb_pipe_flt;
		bool ipa_wdi2;
		bool use_64_bit_dma_mask;
		/* featurize if memory footprint becomes a concern */
		struct ipa3_stats stats;
		void *smem_pipe_mem;
		@@ -1503,6 +1505,7 @@ struct ipa3_plat_drv_res {
		bool ipa_bam_remote_mode;
		bool modem_cfg_emb_pipe_flt;
		bool ipa_wdi2;
		bool use_64_bit_dma_mask;
		u32 wan_rx_ring_size;
		bool skip_uc_pipe_reset;
		enum ipa_transport_type transport_prototype;