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Commit 92389ca8 authored by Rabin Vincent's avatar Rabin Vincent Committed by Linus Walleij
Browse files

ux500: remove build-time changing macros 



To allow the possiblity of building U8500 and U5500 support in the same
image.

Signed-off-by: default avatarRabin Vincent <rabin.vincent@stericsson.com>
[Rebased to latest changes in Russells tree]
Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
parent 0c21e3aa

arch/arm/mach-ux500/clock.c

+10 −4
Original line number Diff line number Diff line
@@ -136,8 +136,7 @@ EXPORT_SYMBOL(clk_disable); 
 */

static unsigned long clk_mtu_get_rate(struct clk *clk)

{

	void __iomem *addr = __io_address(UX500_PRCMU_BASE)

		+ PRCM_TCR;

	void __iomem *addr;

	u32 tcr;

	int mtu = (int) clk->data;

	/*
@@ -149,13 +148,20 @@ static unsigned long clk_mtu_get_rate(struct clk *clk) 
	unsigned long mturate;

	unsigned long retclk;



	if (cpu_is_u5500())

		addr = __io_address(U5500_PRCMU_BASE);

	else if (cpu_is_u8500())

		addr = __io_address(U8500_PRCMU_BASE);

	else

		ux500_unknown_soc();



	/*

	 * On a startup, always conifgure the TCR to the doze mode;

	 * bootloaders do it for us. Do this in the kernel too.

	 */

	writel(PRCM_TCR_DOZE_MODE, addr);

	writel(PRCM_TCR_DOZE_MODE, addr + PRCM_TCR);



	tcr = readl(addr);

	tcr = readl(addr + PRCM_TCR);



	/* Get the rate from the parent as a default */

	if (clk->parent_periph)

arch/arm/mach-ux500/cpu-db5500.c

+10 −2
Original line number Diff line number Diff line
@@ -22,6 +22,16 @@ 
#include "devices-db5500.h"



static struct map_desc u5500_io_desc[] __initdata = {

	__IO_DEV_DESC(U5500_UART0_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_UART2_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_GIC_CPU_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_GIC_DIST_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_L2CC_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_TWD_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_MTU0_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_SCU_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_BACKUPRAM0_BASE, SZ_8K),



	__IO_DEV_DESC(U5500_GPIO0_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_GPIO1_BASE, SZ_4K),

	__IO_DEV_DESC(U5500_GPIO2_BASE, SZ_4K),
@@ -143,8 +153,6 @@ static void __init db5500_add_gpios(void) 


void __init u5500_map_io(void)

{

	ux500_map_io();



	iotable_init(u5500_io_desc, ARRAY_SIZE(u5500_io_desc));

}

arch/arm/mach-ux500/cpu-db8500.c

+16 −2
Original line number Diff line number Diff line
@@ -30,6 +30,22 @@ static struct platform_device *platform_devs[] __initdata = { 


/* minimum static i/o mapping required to boot U8500 platforms */

static struct map_desc u8500_io_desc[] __initdata = {

	__IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_GIC_CPU_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_TWD_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),



	__IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),



	__IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),

	__IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
@@ -117,8 +133,6 @@ bool cpu_is_u8500v20(void) 


void __init u8500_map_io(void)

{

	ux500_map_io();



	iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));



	if (cpu_is_u8500ed())

arch/arm/mach-ux500/cpu.c

+39 −35
Original line number Diff line number Diff line
@@ -23,37 +23,29 @@ 


#include "clock.h"



static struct map_desc ux500_io_desc[] __initdata = {

	__IO_DEV_DESC(UX500_UART0_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_UART2_BASE, SZ_4K),



	__IO_DEV_DESC(UX500_GIC_CPU_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_GIC_DIST_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_L2CC_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_TWD_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_SCU_BASE, SZ_4K),



	__IO_DEV_DESC(UX500_CLKRST1_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_CLKRST2_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_CLKRST3_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_CLKRST5_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_CLKRST6_BASE, SZ_4K),



	__IO_DEV_DESC(UX500_MTU0_BASE, SZ_4K),

	__IO_DEV_DESC(UX500_MTU1_BASE, SZ_4K),



	__IO_DEV_DESC(UX500_BACKUPRAM0_BASE, SZ_8K),

};

#ifdef CONFIG_CACHE_L2X0

static void __iomem *l2x0_base;

#endif



void __init ux500_map_io(void)

{

	iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc));

}



void __init ux500_init_irq(void)

{

	gic_init(0, 29, __io_address(UX500_GIC_DIST_BASE),

		 __io_address(UX500_GIC_CPU_BASE));

	void __iomem *dist_base;

	void __iomem *cpu_base;



	if (cpu_is_u5500()) {

		dist_base = __io_address(U5500_GIC_DIST_BASE);

		cpu_base = __io_address(U5500_GIC_CPU_BASE);

	} else if (cpu_is_u8500()) {

		dist_base = __io_address(U8500_GIC_DIST_BASE);

		cpu_base = __io_address(U8500_GIC_CPU_BASE);

	} else

		ux500_unknown_soc();



	gic_init(0, 29, dist_base, cpu_base);



	/*

	 * Init clocks here so that they are available for system timer
@@ -74,7 +66,8 @@ static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask) 


static inline void ux500_cache_sync(void)

{

	void __iomem *base = __io_address(UX500_L2CC_BASE);

	void __iomem *base = l2x0_base;



	writel_relaxed(0, base + L2X0_CACHE_SYNC);

	ux500_cache_wait(base + L2X0_CACHE_SYNC, 1);

}
@@ -96,20 +89,23 @@ static void ux500_l2x0_disable(void) 
 */

static void ux500_l2x0_inv_all(void)

{

	void __iomem *l2x0_base = __io_address(UX500_L2CC_BASE);

	void __iomem *base = l2x0_base;

	uint32_t l2x0_way_mask = (1<<16) - 1;	/* Bitmask of active ways */



	/* invalidate all ways */

	writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);

	ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);

	writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);

	ux500_cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);

	ux500_cache_sync();

}



static int ux500_l2x0_init(void)

{

	void __iomem *l2x0_base;



	l2x0_base = __io_address(UX500_L2CC_BASE);

	if (cpu_is_u5500())

		l2x0_base = __io_address(U5500_L2CC_BASE);

	else if (cpu_is_u8500())

		l2x0_base = __io_address(U8500_L2CC_BASE);

	else

		ux500_unknown_soc();



	/* 64KB way size, 8 way associativity, force WA */

	l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
@@ -127,13 +123,21 @@ static void __init ux500_timer_init(void) 
{

#ifdef CONFIG_LOCAL_TIMERS

	/* Setup the local timer base */

	twd_base = __io_address(UX500_TWD_BASE);

	if (cpu_is_u5500())

		twd_base = __io_address(U5500_TWD_BASE);

	else if (cpu_is_u8500())

		twd_base = __io_address(U8500_TWD_BASE);

	else

		ux500_unknown_soc();

#endif

	/* Setup the MTU base */

	if (cpu_is_u8500ed())

	if (cpu_is_u5500())

		mtu_base = __io_address(U5500_MTU0_BASE);

	else if (cpu_is_u8500ed())

		mtu_base = __io_address(U8500_MTU0_BASE_ED);

	else if (cpu_is_u8500())

		mtu_base = __io_address(U8500_MTU0_BASE);

	else

		mtu_base = __io_address(UX500_MTU0_BASE);

		ux500_unknown_soc();



	nmdk_timer_init();

}

arch/arm/mach-ux500/include/mach/debug-macro.S

+18 −1
Original line number Diff line number Diff line
@@ -14,7 +14,24 @@ 
#error Invalid Ux500 debug UART

#endif



#define __UX500_UART(n)	UX500_UART##n##_BASE

/*

 * DEBUG_LL only works if only one SOC is built in.  We don't use #else below

 * in order to get "__UX500_UART redefined" warnings if more than one SOC is

 * built, so that there's some hint during the build that something is wrong.

 */



#ifdef CONFIG_UX500_SOC_DB5500

#define __UX500_UART(n)	U5500_UART##n##_BASE

#endif



#ifdef CONFIG_UX500_SOC_DB8500

#define __UX500_UART(n)	U8500_UART##n##_BASE

#endif



#ifndef __UX500_UART

#error Unknown SOC

#endif



#define UX500_UART(n)	__UX500_UART(n)

#define UART_BASE	UX500_UART(CONFIG_UX500_DEBUG_UART)