Loading arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -435,6 +435,27 @@ qcom,xprt-version = <1>; qcom,fragmented-data; }; spmi_bus: qcom,spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x200f000 0x1000>, <0x2400000 0x800000>, <0x2c00000 0x800000>, <0x3800000 0x200000>, <0x200a000 0x2100>; /* includes SPMI_CFG and GENI_CFG */ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupts = <0 190 0>; qcom,pmic-arb-channel = <0>; qcom,pmic-arb-ee = <0>; qcom,pmic-arb-max-peripherals = <256>; qcom,pmic-arb-max-periph-interrupts = <256>; #interrupt-cells = <3>; interrupt-controller; #address-cells = <1>; #size-cells = <0>; cell-index = <0>; qcom,not-wakeup; /* Needed until Full-boot-chain enabled */ }; }; &gdsc_usb30 { Loading Loading
arch/arm/boot/dts/qcom/mdmcalifornium.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -435,6 +435,27 @@ qcom,xprt-version = <1>; qcom,fragmented-data; }; spmi_bus: qcom,spmi@200f000 { compatible = "qcom,spmi-pmic-arb"; reg = <0x200f000 0x1000>, <0x2400000 0x800000>, <0x2c00000 0x800000>, <0x3800000 0x200000>, <0x200a000 0x2100>; /* includes SPMI_CFG and GENI_CFG */ reg-names = "core", "chnls", "obsrvr", "intr", "cnfg"; interrupts = <0 190 0>; qcom,pmic-arb-channel = <0>; qcom,pmic-arb-ee = <0>; qcom,pmic-arb-max-peripherals = <256>; qcom,pmic-arb-max-periph-interrupts = <256>; #interrupt-cells = <3>; interrupt-controller; #address-cells = <1>; #size-cells = <0>; cell-index = <0>; qcom,not-wakeup; /* Needed until Full-boot-chain enabled */ }; }; &gdsc_usb30 { Loading