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Commit 8e910c95 authored by Tony Truong's avatar Tony Truong
Browse files

ARM: dts: msm: update config for PCIe GPIO sleep state 



The structure of describing a GPIO has changed. Therefore,
update the configurations for each PCIe GPIO sleep state.

Change-Id: I51ae173144bffc1e7f262f606e027fb5d103de30
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent 4c5e5900

arch/arm/boot/dts/qcom/msm8996-pinctrl.dtsi

+36 −6
Original line number Diff line number Diff line
@@ -564,7 +564,12 @@ 
			};



			pcie0_clkreq_sleep: pcie0_clkreq_sleep {

				pcie0 {

				mux {

					pins = "gpio36";

					function = "gpio";

				};



				config {

					pins = "gpio36";

					drive-strength = <2>;

					bias-disabled;
@@ -572,7 +577,12 @@ 
			};



			pcie0_wake_sleep: pcie0_wake_sleep {

				pcie0 {

				mux {

					pins = "gpio37";

					function = "gpio";

				};



				config {

					pins = "gpio37";

					drive-strength = <2>;

					bias-disabled;
@@ -621,7 +631,12 @@ 
			};



			pcie1_clkreq_sleep: pcie1_clkreq_sleep {

				pcie1 {

				mux {

					pins = "gpio131";

					function = "gpio";

				};



				config {

					pins = "gpio131";

					drive-strength = <2>;

					bias-disable;
@@ -629,7 +644,12 @@ 
			};



			pcie1_wake_sleep: pcie1_wake_sleep {

				pcie1 {

				mux {

					pins = "gpio132";

					function = "gpio";

				};



				config {

					pins = "gpio132";

					drive-strength = <2>;

					bias-disable;
@@ -678,7 +698,12 @@ 
			};



			pcie2_clkreq_sleep: pcie2_clkreq_sleep {

				pcie2 {

				mux {

					pins = "gpio115";

					function = "gpio";

				};



				config {

					pins = "gpio115";

					drive-strength = <2>;

					bias-disable;
@@ -686,7 +711,12 @@ 
			};



			pcie2_wake_sleep: pcie2_wake_sleep {

				pcie2 {

				mux {

					pins = "gpio116";

					function = "gpio";

				};



				config {

					pins = "gpio116";

					drive-strength = <2>;

					bias-disable;