Loading arch/arm/boot/dts/qcom/msmgold.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -1054,8 +1054,9 @@ }; &gdsc_oxili_gx { clock-names = "core_root_clk"; clocks =<&clock_gcc clk_gfx3d_clk_src>; clock-names = "core_root_clk", "gfx_clk"; clocks =<&clock_gcc clk_gfx3d_clk_src>, <&clock_gcc clk_gcc_oxili_gfx3d_clk>; qcom,enable-root-clk; qcom,clk-dis-wait-val = <0x5>; status = "okay"; Loading Loading
arch/arm/boot/dts/qcom/msmgold.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -1054,8 +1054,9 @@ }; &gdsc_oxili_gx { clock-names = "core_root_clk"; clocks =<&clock_gcc clk_gfx3d_clk_src>; clock-names = "core_root_clk", "gfx_clk"; clocks =<&clock_gcc clk_gfx3d_clk_src>, <&clock_gcc clk_gcc_oxili_gfx3d_clk>; qcom,enable-root-clk; qcom,clk-dis-wait-val = <0x5>; status = "okay"; Loading