Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 8d7b0809 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "Revert "ARM: dts: msm: configure VDD_APCC CPR for HMSS alternate PLL on msm8996v3""

parents 2dd30233 a9c1e0a2
Loading
Loading
Loading
Loading
+9 −7
Original line number Diff line number Diff line
@@ -576,7 +576,9 @@
		vdd-thread0-ldo-ret-supply = <&kryo0_retention_vreg>;
		vdd-thread1-ldo-ret-supply = <&kryo1_retention_vreg>;

		qcom,cpr-enable;
		qcom,cpr-hw-closed-loop;
		qcom,cpr-clock-throttling = <0x20>;

		thread@0 {
			qcom,cpr-thread-id = <0>;
@@ -608,9 +610,9 @@
					1140000>;
				qcom,cpr-voltage-floor =
					<470000  470000  470000  470000  470000
					 470000  680000  680000  680000  680000
					 680000  680000  680000  680000  680000
					 680000>;
					 470000  470000  470000  470000  470000
					 470000  470000  470000  470000  470000
					 470000>;
				qcom,cpr-floor-to-ceiling-max-range =
					 <80000   80000   80000   80000   80000
					  80000   80000   80000   80000   80000
@@ -742,10 +744,10 @@
				       1140000 1140000 1140000 1140000 1140000>;
				qcom,cpr-voltage-floor =
				       <470000  470000  470000  470000  470000
					470000  680000  680000  680000  680000
					680000  680000  680000  680000  680000
					680000  680000  680000  680000  680000
					680000  680000  680000  680000  680000>;
					470000  470000  470000  470000  470000
					470000  470000  470000  470000  470000
					470000  470000  470000  470000  470000
					470000  470000  470000  470000  470000>;
				qcom,cpr-floor-to-ceiling-max-range =
					<80000   80000   80000   80000   80000
					 80000   80000   80000   80000   80000
+0 −1
Original line number Diff line number Diff line
@@ -77,7 +77,6 @@
	qcom,apm-hysteresis-voltage = <5000>;

	qcom,cpr-enable;
	qcom,cpr-clock-throttling = <0x20>;
};

&apc0_pwrcl_vreg {
+9 −0
Original line number Diff line number Diff line
@@ -1280,6 +1280,15 @@ int __init cpu_clock_8996_early_init(void)
	if (cpu_clocks_v3) {
		pwrcl_alt_pll.offline_bit_workaround = false;
		perfcl_alt_pll.offline_bit_workaround = false;
		pwrcl_pll.vals.config_ctl_val = 0x200d4828;
		pwrcl_pll.vals.config_ctl_hi_val = 0x006;
		perfcl_pll.vals.config_ctl_val = 0x200d4828;
		perfcl_pll.vals.config_ctl_hi_val = 0x006;
		cbf_pll.vals.config_ctl_val = 0x200d4828;
		cbf_pll.vals.config_ctl_hi_val = 0x006;
		pwrcl_pll.vals.test_ctl_lo_val = 0x1C000000;
		perfcl_pll.vals.test_ctl_lo_val = 0x1C000000;
		cbf_pll.vals.test_ctl_lo_val = 0x1C000000;
	}

	/*