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Commit 8d5f4e94 authored by gaolez's avatar gaolez
Browse files

ARM: dts: msm: Add wlan naples support to apq8009 refboard 



Add wlan naples support to apq8009 som refboard. Sdhc node is added
to configure SD slot to sdio interface for wlan rome sdio.

Change-Id: Icd6c0d2f0171bdc820e2b3e4555e79c6dffc29a3
CRs-Fixed: 2183584
Signed-off-by: default avatarGaole Zhang <gaolez@codeaurora.org>
parent eff4eda6

arch/arm/boot/dts/qcom/apq8009-mtp-wcd9326-excelpoint-refboard.dts

+83 −0
Original line number Diff line number Diff line
@@ -150,6 +150,89 @@ 
		compatible = "qca,qca9379";

		qca,bt-reset-gpio = <&msm_gpio 47 0>; /* BT_EN */

	};



	cnss_sdio: qcom,cnss_sdio {

		compatible = "qcom,cnss_sdio";

		subsys-name = "AR6320";

		/**

		* There is no vdd-wlan on board and this is not for DSRC.

		* IO and XTAL share the same vreg.

		*/

		vdd-wlan-io-supply = <&pm8916_l5>;

		qcom,cap-tsf-gpio = <&msm_gpio 42 1>;

		qcom,wlan-ramdump-dynamic = <0x200000>;

		qcom,msm-bus,name = "msm-cnss";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<79 512 0 0>,             /* No vote */

				<79 512 6250 200000>,     /* 50 Mbps */

				<79 512 25000 200000>,    /* 200 Mbps */

				<79 512 2048000 4096000>; /* MAX */

	};

};



&wcnss {

	status = "disabled";

};



&msm_gpio {

	sdc2_wlan_gpio_on: sdc2_wlan_gpio_on {

		mux {

			pins = "gpio43";

			function = "gpio";

		};

		config {

			pins = "gpio43";

			drive-strength = <10>;

			bias-pull-up;

			output-high;

		};

	};



	sdc2_wlan_gpio_off: sdc2_wlan_gpio_off {

		mux {

			pins = "gpio43";

			function = "gpio";

		};

		config {

			pins = "gpio43";

			drive-strength = <2>;

			bias-disable;

			output-low;

		};

	};

};



&sdhc_2 {

	/delete-property/cd-gpios;

	#address-cells = <0>;

	interrupt-parent = <&sdhc_2>;

	interrupts = <0 1 2>;

	#interrupt-cells = <1>;

	interrupt-map-mask = <0xffffffff>;

	interrupt-map = <0 &intc 0 125 0

			1 &intc 0 221 0

			2 &msm_gpio 38 0>;

	interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";



	qcom,vdd-voltage-level = <1800000 2950000>;

	qcom,vdd-current-level = <15000 400000>;



	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 50000>;

	qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;

	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on

			&sdc2_wlan_gpio_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off

			&sdc2_wlan_gpio_off>;

	qcom,nonremovable;

	qcom,core_3_0v_support;



	status = "ok";

};



&i2c_4 {

arch/arm/boot/dts/qcom/apq8009-mtp-wcd9326-refboard.dts

+82 −0
Original line number Diff line number Diff line
@@ -128,6 +128,88 @@ 
		compatible = "qca,qca9379";

		qca,bt-reset-gpio = <&msm_gpio 47 0>; /* BT_EN */

	};



	cnss_sdio: qcom,cnss_sdio {

		compatible = "qcom,cnss_sdio";

		subsys-name = "AR6320";

		/**

		* There is no vdd-wlan on board and this is not for DSRC.

		* IO and XTAL share the same vreg.

		*/

		vdd-wlan-io-supply = <&pm8916_l5>;

		qcom,cap-tsf-gpio = <&msm_gpio 42 1>;

		qcom,wlan-ramdump-dynamic = <0x200000>;

		qcom,msm-bus,name = "msm-cnss";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<79 512 0 0>,             /* No vote */

				<79 512 6250 200000>,     /* 50 Mbps */

				<79 512 25000 200000>,    /* 200 Mbps */

				<79 512 2048000 4096000>; /* MAX */

	};

};



&wcnss {

	status = "disabled";

};



&msm_gpio {

	sdc2_wlan_gpio_on: sdc2_wlan_gpio_on {

		mux {

			pins = "gpio43";

			function = "gpio";

		};

		config {

			pins = "gpio43";

			drive-strength = <10>;

			bias-pull-up;

			output-high;

		};

	};



	sdc2_wlan_gpio_off: sdc2_wlan_gpio_off {

		mux {

			pins = "gpio43";

			function = "gpio";

		};

		config {

			pins = "gpio43";

			drive-strength = <2>;

			bias-disable;

			output-low;

		};

	};

};



&sdhc_2 {

	/delete-property/cd-gpios;

	#address-cells = <0>;

	interrupt-parent = <&sdhc_2>;

	interrupts = <0 1 2>;

	#interrupt-cells = <1>;

	interrupt-map-mask = <0xffffffff>;

	interrupt-map = <0 &intc 0 125 0

			1 &intc 0 221 0

			2 &msm_gpio 38 0>;

	interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq";



	qcom,vdd-voltage-level = <1800000 2950000>;

	qcom,vdd-current-level = <15000 400000>;



	qcom,vdd-io-voltage-level = <1800000 1800000>;

	qcom,vdd-io-current-level = <200 50000>;

	qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>;

	qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104";



	pinctrl-names = "active", "sleep";

	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on

	&sdc2_wlan_gpio_on>;

	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off

	&sdc2_wlan_gpio_off>;

	qcom,nonremovable;

	qcom,core_3_0v_support;

	status = "ok";

};



&i2c_4 {