Merge "clk: msm: gcc: Add support for clocks for MSM8920" (8d0dac8c) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/devicetree/bindings/arm/msm/clock-controller.txt

+3 −0

Original line number	Diff line number	Diff line
		@@ -27,6 +27,7 @@ Required properties:
		"qcom,gcc-spm-8937"
		"qcom,gcc-8953"
		"qcom,gcc-8940"
		"qcom,gcc-8920"
		"qcom,rpmcc-8994"
		"qcom,rpmcc-8992"
		"qcom,rpmcc-8916"
		@@ -46,6 +47,7 @@ Required properties:
		"qcom,cc-debug-8937"
		"qcom,cc-debug-8917"
		"qcom,cc-debug-8940"
		"qcom,cc-debug-8920"
		"qcom,gcc-mdss-8936"
		"qcom,gcc-mdss-8909"
		"qcom,gcc-mdss-8916"
		@@ -54,6 +56,7 @@ Required properties:
		"qcom,gcc-mdss-8917"
		"qcom,gcc-mdss-8953"
		"qcom,gcc-mdss-8940"
		"qcom,gcc-mdss-8920"
		"qcom,mmsscc-8994v2"
		"qcom,mmsscc-8994"
		"qcom,mmsscc-8992"

arch/arm/boot/dts/qcom/msm8920.dtsi

+17 −0

Original line number	Diff line number	Diff line
		@@ -128,3 +128,20 @@
		&bam_dmux {
		status = "disabled";
		};

		&ad_hoc_bus {
		mas_ipa: mas-ipa {
		cell-id = <MSM_BUS_MASTER_IPA>;
		label = "mas-ipa";
		qcom,buswidth = <8>;
		qcom,agg-ports = <1>;
		qcom,ap-owned;
		qcom,qport = <14>;
		qcom,qos-mode = "fixed";
		qcom,connections = <&snoc_int_1 &slv_snoc_bimc_1>;
		qcom,prio1 = <0>;
		qcom,prio0 = <0>;
		qcom,bus-dev = <&fab_snoc>;
		qcom,mas-rpm-id = <ICBID_MASTER_IPA>;
		};
		};

drivers/clk/msm/clock-gcc-8952.c

+34 −3

Original line number	Diff line number	Diff line
		@@ -4014,6 +4014,22 @@ static struct clk_lookup msm_clocks_lookup_8917[] = {
		CLK_LIST(gcc_gtcu_ahb_clk),
		};

		static struct clk_lookup msm_clocks_lookup_8920[] = {
		CLK_LIST(gpll0_clk_src_8937),
		CLK_LIST(gpll0_ao_clk_src_8937),
		CLK_LIST(gpll0_sleep_clk_src),
		CLK_LIST(bimc_gpu_clk),
		CLK_LIST(bimc_gpu_a_clk),
		CLK_LIST(gcc_dcc_clk),
		CLK_LIST(gcc_qdss_dap_clk),
		CLK_LIST(gcc_gfx_tcu_clk),
		CLK_LIST(gcc_gfx_tbu_clk),
		CLK_LIST(gcc_gtcu_ahb_clk),
		CLK_LIST(ipa_clk),
		CLK_LIST(ipa_a_clk),
		CLK_LIST(gcc_ipa_tbu_clk),
		};

		static struct clk_lookup msm_clocks_lookup_8940[] = {
		CLK_LIST(gpll0_clk_src_8937),
		CLK_LIST(gpll0_ao_clk_src_8937),
		@@ -4259,6 +4275,7 @@ static int msm_gcc_probe(struct platform_device *pdev)
		bool compat_bin = false;
		bool compat_bin2 = false;
		bool compat_bin3 = false;
		bool compat_bin4 = false;

		compat_bin = of_device_is_compatible(pdev->dev.of_node,
		"qcom,gcc-8937");
		@@ -4269,6 +4286,9 @@ static int msm_gcc_probe(struct platform_device *pdev)
		compat_bin3 = of_device_is_compatible(pdev->dev.of_node,
		"qcom,gcc-8940");

		compat_bin4 = of_device_is_compatible(pdev->dev.of_node,
		"qcom,gcc-8920");

		ret = vote_bimc(&bimc_clk, INT_MAX);
		if (ret < 0)
		return ret;
		@@ -4301,7 +4321,7 @@ static int msm_gcc_probe(struct platform_device *pdev)
		return PTR_ERR(vdd_dig.regulator[0]);
		}

		if (!compat_bin2) {
		if (!compat_bin2 && !compat_bin4) {
		vdd_sr2_pll.regulator[0] = devm_regulator_get(&pdev->dev,
		"vdd_sr2_pll");
		if (IS_ERR(vdd_sr2_pll.regulator[0])) {
		@@ -4359,7 +4379,7 @@ static int msm_gcc_probe(struct platform_device *pdev)
		ftbl_gcc_oxili_gfx3d_clk_8937_475MHz;
		gfx3d_clk_src.c.fmax[VDD_DIG_SUPER_TUR] = 475000000;
		}
		} else if (compat_bin2) {
		} else if (compat_bin2 \|\| compat_bin4) {
		gpll0_clk_src.c.parent = &gpll0_clk_src_8937.c;
		gpll0_ao_clk_src.c.parent = &gpll0_ao_clk_src_8937.c;
		vdd_dig.num_levels = VDD_DIG_NUM_8917;
		@@ -4391,6 +4411,10 @@ static int msm_gcc_probe(struct platform_device *pdev)
		ret = of_msm_clock_register(pdev->dev.of_node,
		msm_clocks_lookup_8940,
		ARRAY_SIZE(msm_clocks_lookup_8940));
		else if (compat_bin4)
		ret = of_msm_clock_register(pdev->dev.of_node,
		msm_clocks_lookup_8920,
		ARRAY_SIZE(msm_clocks_lookup_8920));
		else
		ret = of_msm_clock_register(pdev->dev.of_node,
		msm_clocks_lookup_8952,
		@@ -4442,6 +4466,7 @@ static struct of_device_id msm_clock_gcc_match_table[] = {
		{ .compatible = "qcom,gcc-8937" },
		{ .compatible = "qcom,gcc-8917" },
		{ .compatible = "qcom,gcc-8940" },
		{ .compatible = "qcom,gcc-8920" },
		{}
		};

		@@ -4557,6 +4582,7 @@ static int msm_clock_debug_probe(struct platform_device *pdev)
		struct resource *res;
		bool compat_bin = false, compat_bin2 = false;
		bool compat_bin3 = false;
		bool compat_bin4 = false;

		compat_bin = of_device_is_compatible(pdev->dev.of_node,
		"qcom,cc-debug-8937");
		@@ -4567,6 +4593,9 @@ static int msm_clock_debug_probe(struct platform_device *pdev)
		compat_bin3 = of_device_is_compatible(pdev->dev.of_node,
		"qcom,cc-debug-8940");

		compat_bin4 = of_device_is_compatible(pdev->dev.of_node,
		"qcom,cc-debug-8920");

		res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "meas");
		if (!res) {
		dev_err(&pdev->dev, "GLB clock diag base not defined.\n");
		@@ -4585,7 +4614,7 @@ static int msm_clock_debug_probe(struct platform_device *pdev)
		if (compat_bin2)
		gcc_debug_mux_8937.post_div = 0x3;

		if (!compat_bin && !compat_bin2 && !compat_bin3)
		if (!compat_bin && !compat_bin2 && !compat_bin3 && !compat_bin4)
		ret = of_msm_clock_register(pdev->dev.of_node,
		msm_clocks_measure, ARRAY_SIZE(msm_clocks_measure));
		else
		@@ -4606,6 +4635,7 @@ static struct of_device_id msm_clock_debug_match_table[] = {
		{ .compatible = "qcom,cc-debug-8937" },
		{ .compatible = "qcom,cc-debug-8917" },
		{ .compatible = "qcom,cc-debug-8940" },
		{ .compatible = "qcom,cc-debug-8920" },
		{}
		};

		@@ -4729,6 +4759,7 @@ static struct of_device_id msm_clock_mdss_match_table[] = {
		{ .compatible = "qcom,gcc-mdss-8937" },
		{ .compatible = "qcom,gcc-mdss-8917" },
		{ .compatible = "qcom,gcc-mdss-8940" },
		{ .compatible = "qcom,gcc-mdss-8920" },
		{}
		};