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Commit 8bfdbb1b authored by navin patidar's avatar navin patidar Committed by Greg Kroah-Hartman
Browse files

staging: rtl8188eu: Hal8188EPwrSeq.c: fix lines over 80 characters.

parent 876cbe23
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+31 −15
Original line number Diff line number Diff line
@@ -25,61 +25,77 @@
    drivers should parse below arrays and do the corresponding actions
*/
/* 3 Power on  Array */
struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_power_on_flow[RTL8188E_TRANS_CARDEMU_TO_ACT_STEPS +
					 RTL8188E_TRANS_END_STEPS] = {
	RTL8188E_TRANS_CARDEMU_TO_ACT
	RTL8188E_TRANS_END
};

/* 3Radio off Array */
struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_radio_off_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
					  RTL8188E_TRANS_END_STEPS] = {
	RTL8188E_TRANS_ACT_TO_CARDEMU
	RTL8188E_TRANS_END
};

/* 3Card Disable Array */
struct wl_pwr_cfg rtl8188E_card_disable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_card_disable_flow
	[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
	 RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
	 RTL8188E_TRANS_END_STEPS] = {
		RTL8188E_TRANS_ACT_TO_CARDEMU
		RTL8188E_TRANS_CARDEMU_TO_CARDDIS
		RTL8188E_TRANS_END
};

/* 3 Card Enable Array */
struct wl_pwr_cfg rtl8188E_card_enable_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_card_enable_flow
	[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
	 RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
	 RTL8188E_TRANS_END_STEPS] = {
		RTL8188E_TRANS_CARDDIS_TO_CARDEMU
		RTL8188E_TRANS_CARDEMU_TO_ACT
		RTL8188E_TRANS_END
};

/* 3Suspend Array */
struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_suspend_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
					RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
					RTL8188E_TRANS_END_STEPS] = {
	RTL8188E_TRANS_ACT_TO_CARDEMU
	RTL8188E_TRANS_CARDEMU_TO_SUS
	RTL8188E_TRANS_END
};

/* 3 Resume Array */
struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_resume_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
				       RTL8188E_TRANS_CARDEMU_TO_SUS_STEPS +
				       RTL8188E_TRANS_END_STEPS] = {
	RTL8188E_TRANS_SUS_TO_CARDEMU
	RTL8188E_TRANS_CARDEMU_TO_ACT
	RTL8188E_TRANS_END
};

/* 3HWPDN Array */
struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS + RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_hwpdn_flow[RTL8188E_TRANS_ACT_TO_CARDEMU_STEPS +
				      RTL8188E_TRANS_CARDEMU_TO_PDN_STEPS +
				      RTL8188E_TRANS_END_STEPS] = {
	RTL8188E_TRANS_ACT_TO_CARDEMU
	RTL8188E_TRANS_CARDEMU_TO_PDN
	RTL8188E_TRANS_END
};

/* 3 Enter LPS */
struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_enter_lps_flow[RTL8188E_TRANS_ACT_TO_LPS_STEPS +
					  RTL8188E_TRANS_END_STEPS] = {
	/* FW behavior */
	RTL8188E_TRANS_ACT_TO_LPS
	RTL8188E_TRANS_END
};

/* 3 Leave LPS */
struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS + RTL8188E_TRANS_END_STEPS] = {
struct wl_pwr_cfg rtl8188E_leave_lps_flow[RTL8188E_TRANS_LPS_TO_ACT_STEPS +
					  RTL8188E_TRANS_END_STEPS] = {
	/* FW behavior */
	RTL8188E_TRANS_LPS_TO_ACT
	RTL8188E_TRANS_END