Loading arch/arm/mach-imx/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -595,6 +595,7 @@ comment "i.MX6 family:" config SOC_IMX6Q bool "i.MX6 Quad support" select ARM_CPU_SUSPEND if PM select ARM_GIC select CACHE_L2X0 select CPU_V7 Loading arch/arm/mach-imx/Makefile +5 −1 Original line number Diff line number Diff line Loading @@ -70,4 +70,8 @@ AFLAGS_head-v7.o :=-Wa,-march=armv7-a obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o ifeq ($(CONFIG_PM),y) obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o endif arch/arm/mach-imx/head-v7.S +11 −4 Original line number Diff line number Diff line Loading @@ -71,6 +71,7 @@ ENTRY(v7_secondary_startup) ENDPROC(v7_secondary_startup) #endif #ifdef CONFIG_PM /* * The following code is located into the .data section. This is to * allow phys_l2x0_saved_regs to be accessed with a relative load Loading @@ -79,6 +80,7 @@ ENDPROC(v7_secondary_startup) .data .align #ifdef CONFIG_CACHE_L2X0 .macro pl310_resume ldr r2, phys_l2x0_saved_regs ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0 Loading @@ -88,12 +90,17 @@ ENDPROC(v7_secondary_startup) str r1, [r0, #L2X0_CTRL] @ re-enable L2 .endm .globl phys_l2x0_saved_regs phys_l2x0_saved_regs: .long 0 #else .macro pl310_resume .endm #endif ENTRY(v7_cpu_resume) bl v7_invalidate_l1 pl310_resume b cpu_resume ENDPROC(v7_cpu_resume) .globl phys_l2x0_saved_regs phys_l2x0_saved_regs: .long 0 #endif arch/arm/mach-imx/pm-imx6q.c +2 −0 Original line number Diff line number Diff line Loading @@ -64,7 +64,9 @@ void __init imx6q_pm_init(void) * address of the data structure used by l2x0 core to save registers, * and later restore the necessary ones in imx6q resume entry. */ #ifdef CONFIG_CACHE_L2X0 phys_l2x0_saved_regs = __pa(&l2x0_saved_regs); #endif suspend_set_ops(&imx6q_pm_ops); } arch/arm/mach-mx5/mm.c +18 −1 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/clk.h> #include <asm/mach/map.h> Loading @@ -21,10 +22,26 @@ #include <mach/devices-common.h> #include <mach/iomux-v3.h> static struct clk *gpc_dvfs_clk; static void imx5_idle(void) { if (!need_resched()) if (!need_resched()) { /* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk)) goto err0; } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); if (tzic_enable_wake()) goto err1; cpu_do_idle(); err1: clk_disable(gpc_dvfs_clk); } err0: local_irq_enable(); } Loading Loading
arch/arm/mach-imx/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -595,6 +595,7 @@ comment "i.MX6 family:" config SOC_IMX6Q bool "i.MX6 Quad support" select ARM_CPU_SUSPEND if PM select ARM_GIC select CACHE_L2X0 select CPU_V7 Loading
arch/arm/mach-imx/Makefile +5 −1 Original line number Diff line number Diff line Loading @@ -70,4 +70,8 @@ AFLAGS_head-v7.o :=-Wa,-march=armv7-a obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o pm-imx6q.o obj-$(CONFIG_SOC_IMX6Q) += clock-imx6q.o mach-imx6q.o ifeq ($(CONFIG_PM),y) obj-$(CONFIG_SOC_IMX6Q) += pm-imx6q.o endif
arch/arm/mach-imx/head-v7.S +11 −4 Original line number Diff line number Diff line Loading @@ -71,6 +71,7 @@ ENTRY(v7_secondary_startup) ENDPROC(v7_secondary_startup) #endif #ifdef CONFIG_PM /* * The following code is located into the .data section. This is to * allow phys_l2x0_saved_regs to be accessed with a relative load Loading @@ -79,6 +80,7 @@ ENDPROC(v7_secondary_startup) .data .align #ifdef CONFIG_CACHE_L2X0 .macro pl310_resume ldr r2, phys_l2x0_saved_regs ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0 Loading @@ -88,12 +90,17 @@ ENDPROC(v7_secondary_startup) str r1, [r0, #L2X0_CTRL] @ re-enable L2 .endm .globl phys_l2x0_saved_regs phys_l2x0_saved_regs: .long 0 #else .macro pl310_resume .endm #endif ENTRY(v7_cpu_resume) bl v7_invalidate_l1 pl310_resume b cpu_resume ENDPROC(v7_cpu_resume) .globl phys_l2x0_saved_regs phys_l2x0_saved_regs: .long 0 #endif
arch/arm/mach-imx/pm-imx6q.c +2 −0 Original line number Diff line number Diff line Loading @@ -64,7 +64,9 @@ void __init imx6q_pm_init(void) * address of the data structure used by l2x0 core to save registers, * and later restore the necessary ones in imx6q resume entry. */ #ifdef CONFIG_CACHE_L2X0 phys_l2x0_saved_regs = __pa(&l2x0_saved_regs); #endif suspend_set_ops(&imx6q_pm_ops); }
arch/arm/mach-mx5/mm.c +18 −1 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ #include <linux/mm.h> #include <linux/init.h> #include <linux/clk.h> #include <asm/mach/map.h> Loading @@ -21,10 +22,26 @@ #include <mach/devices-common.h> #include <mach/iomux-v3.h> static struct clk *gpc_dvfs_clk; static void imx5_idle(void) { if (!need_resched()) if (!need_resched()) { /* gpc clock is needed for SRPG */ if (gpc_dvfs_clk == NULL) { gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); if (IS_ERR(gpc_dvfs_clk)) goto err0; } clk_enable(gpc_dvfs_clk); mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); if (tzic_enable_wake()) goto err1; cpu_do_idle(); err1: clk_disable(gpc_dvfs_clk); } err0: local_irq_enable(); } Loading