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Commit 8ad97905 authored by Yinghai Lu's avatar Yinghai Lu Committed by Ingo Molnar
Browse files

x86: more MTRR debug printouts 



Impact: improve MTRR debugging messages

There's still inefficiencies suspected with the MTRR sanitizing
code, so make sure we get all the info we need from a dmesg.

- Remove unneeded mtrr_show

 (It will only printout one time by first cpu, so it is no big deal.)

- Also print out directly from get_mtrr, because it doesn't update mtrr_state.

Signed-off-by: default avatarYinghai Lu <yinghai@kernel.org>
LKML-Reference: <49B9BA5A.40108@kernel.org>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent a98fe7f3

arch/x86/kernel/cpu/mtrr/generic.c

+51 −44
Original line number Diff line number Diff line
@@ -33,14 +33,6 @@ u64 mtrr_tom2; 
struct mtrr_state_type mtrr_state = {};

EXPORT_SYMBOL_GPL(mtrr_state);



static int __initdata mtrr_show;

static int __init mtrr_debug(char *opt)

{

	mtrr_show = 1;

	return 0;

}

early_param("mtrr.show", mtrr_debug);



/*

 * Returns the effective MTRR type for the region

 * Error returns:
@@ -193,45 +185,16 @@ static void print_fixed(unsigned base, unsigned step, const mtrr_type*types) 
	unsigned i;



	for (i = 0; i < 8; ++i, ++types, base += step)

		printk(KERN_INFO "MTRR %05X-%05X %s\n",

		printk(KERN_INFO "  %05X-%05X %s\n",

			base, base + step - 1, mtrr_attrib_to_str(*types));

}



static void prepare_set(void);

static void post_set(void);



/*  Grab all of the MTRR state for this CPU into *state  */

void __init get_mtrr_state(void)

static void __init print_mtrr_state(void)

{

	unsigned int i;

	struct mtrr_var_range *vrs;

	unsigned lo, dummy;

	unsigned long flags;



	vrs = mtrr_state.var_ranges;



	rdmsr(MTRRcap_MSR, lo, dummy);

	mtrr_state.have_fixed = (lo >> 8) & 1;



	for (i = 0; i < num_var_ranges; i++)

		get_mtrr_var_range(i, &vrs[i]);

	if (mtrr_state.have_fixed)

		get_fixed_ranges(mtrr_state.fixed_ranges);



	rdmsr(MTRRdefType_MSR, lo, dummy);

	mtrr_state.def_type = (lo & 0xff);

	mtrr_state.enabled = (lo & 0xc00) >> 10;



	if (amd_special_default_mtrr()) {

		unsigned low, high;

		/* TOP_MEM2 */

		rdmsr(MSR_K8_TOP_MEM2, low, high);

		mtrr_tom2 = high;

		mtrr_tom2 <<= 32;

		mtrr_tom2 |= low;

		mtrr_tom2 &= 0xffffff800000ULL;

	}

	if (mtrr_show) {

	int high_width;



	printk(KERN_INFO "MTRR default type: %s\n", mtrr_attrib_to_str(mtrr_state.def_type));
@@ -249,7 +212,7 @@ void __init get_mtrr_state(void) 
	high_width = ((size_or_mask ? ffs(size_or_mask) - 1 : 32) - (32 - PAGE_SHIFT) + 3) / 4;

	for (i = 0; i < num_var_ranges; ++i) {

		if (mtrr_state.var_ranges[i].mask_lo & (1 << 11))

				printk(KERN_INFO "MTRR %u base %0*X%05X000 mask %0*X%05X000 %s\n",

			printk(KERN_INFO "  %u base %0*X%05X000 mask %0*X%05X000 %s\n",

			       i,

			       high_width,

			       mtrr_state.var_ranges[i].base_hi,
@@ -259,13 +222,48 @@ void __init get_mtrr_state(void) 
			       mtrr_state.var_ranges[i].mask_lo >> 12,

			       mtrr_attrib_to_str(mtrr_state.var_ranges[i].base_lo & 0xff));

		else

				printk(KERN_INFO "MTRR %u disabled\n", i);

			printk(KERN_INFO "   %u disabled\n", i);

	}

	if (mtrr_tom2) {

		printk(KERN_INFO "TOM2: %016llx aka %lldM\n",

				  mtrr_tom2, mtrr_tom2>>20);

	}

}



/*  Grab all of the MTRR state for this CPU into *state  */

void __init get_mtrr_state(void)

{

	unsigned int i;

	struct mtrr_var_range *vrs;

	unsigned lo, dummy;

	unsigned long flags;



	vrs = mtrr_state.var_ranges;



	rdmsr(MTRRcap_MSR, lo, dummy);

	mtrr_state.have_fixed = (lo >> 8) & 1;



	for (i = 0; i < num_var_ranges; i++)

		get_mtrr_var_range(i, &vrs[i]);

	if (mtrr_state.have_fixed)

		get_fixed_ranges(mtrr_state.fixed_ranges);



	rdmsr(MTRRdefType_MSR, lo, dummy);

	mtrr_state.def_type = (lo & 0xff);

	mtrr_state.enabled = (lo & 0xc00) >> 10;



	if (amd_special_default_mtrr()) {

		unsigned low, high;

		/* TOP_MEM2 */

		rdmsr(MSR_K8_TOP_MEM2, low, high);

		mtrr_tom2 = high;

		mtrr_tom2 <<= 32;

		mtrr_tom2 |= low;

		mtrr_tom2 &= 0xffffff800000ULL;

	}



	print_mtrr_state();



	mtrr_state_set = 1;



	/* PAT setup for BP. We need to go through sync steps here */
@@ -377,7 +375,12 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base, 
	unsigned int mask_lo, mask_hi, base_lo, base_hi;

	unsigned int tmp, hi;



	/*

	 * get_mtrr doesn't need to update mtrr_state, also it could be called

	 * from any cpu, so try to print it out directly.

	 */

	rdmsr(MTRRphysMask_MSR(reg), mask_lo, mask_hi);



	if ((mask_lo & 0x800) == 0) {

		/*  Invalid (i.e. free) range  */

		*base = 0;
@@ -407,6 +410,10 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base, 
	*size = -mask_lo;

	*base = base_hi << (32 - PAGE_SHIFT) | base_lo >> PAGE_SHIFT;

	*type = base_lo & 0xff;



	printk(KERN_DEBUG "  get_mtrr: cpu%d reg%02d base=%010lx size=%010lx %s\n",

			smp_processor_id(), reg, *base, *size,

			mtrr_attrib_to_str(*type & 0xff));

}



/**