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Commit 89f927af authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville
Browse files

ath9k: add TX99 support 

TX99 support enables Specific Absorption Rate (SAR) testing.
SAR is the unit of measurement for the amount of radio frequency(RF)
absorbed by the body when using a wireless device. The RF
exposure limits used are expressed in the terms of SAR, which is a
measure of the electric and magnetic field strength and power density
for transmitters operating at frequencies from 300 kHz to 100 GHz.

Regulatory bodies around the world require that wireless device
be evaluated to meet the RF exposure limits set forth in the
governmental SAR regulations.

In the examples below, for more bit rate options see the iw TX bitrate
setting documentation:

http://wireless.kernel.org/en/users/Documentation/iw#Modifying_transmit_bitrates



Example usage:

iw phy phy0 interface add moni0 type monitor
ip link set dev moni0 up

iw dev moni0 set channel 36 HT40+
iw set bitrates mcs-5 4

echo 10 > /sys/kernel/debug/ieee80211/phy0/ath9k/tx99_power
echo 1  > /sys/kernel/debug/ieee80211/phy0/ath9k/tx99

Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: default avatarLuis R. Rodriguez <mcgrof@do-not-panic.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 09b029b6

drivers/net/wireless/ath/ath9k/Kconfig

+20 −0
Original line number Diff line number Diff line
@@ -84,6 +84,26 @@ config ATH9K_DFS_CERTIFIED 
	  developed. At this point enabling this option won't do anything

	  except increase code size.



config ATH9K_TX99

	bool "Atheros ath9k TX99 testing support"

	depends on CFG80211_CERTIFICATION_ONUS

	default n

	---help---

	  Say N. This should only be enabled on systems undergoing

	  certification testing and evaluation in a controlled environment.

	  Enabling this will only enable TX99 support, all other modes of

	  operation will be disabled.



	  TX99 support enables Specific Absorption Rate (SAR) testing.

	  SAR is the unit of measurement for the amount of radio frequency(RF)

	  absorbed by the body when using a wireless device. The RF exposure

	  limits used are expressed in the terms of SAR, which is a measure

	  of the electric and magnetic field strength and power density for

	  transmitters operating at frequencies from 300 kHz to 100 GHz.

	  Regulatory bodies around the world require that wireless device

	  be evaluated to meet the RF exposure limits set forth in the

	  governmental SAR regulations.



config ATH9K_LEGACY_RATE_CONTROL

	bool "Atheros ath9k rate control"

	depends on ATH9K

drivers/net/wireless/ath/ath9k/ar9002_phy.c

+22 −0
Original line number Diff line number Diff line
@@ -680,6 +680,26 @@ static void ar9002_hw_spectral_scan_wait(struct ath_hw *ah) 
	}

}



static void ar9002_hw_tx99_start(struct ath_hw *ah, u32 qnum)

{

	REG_SET_BIT(ah, 0x9864, 0x7f000);

	REG_SET_BIT(ah, 0x9924, 0x7f00fe);

	REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);

	REG_WRITE(ah, AR_CR, AR_CR_RXD);

	REG_WRITE(ah, AR_DLCL_IFS(qnum), 0);

	REG_WRITE(ah, AR_D_GBL_IFS_SIFS, 20);

	REG_WRITE(ah, AR_D_GBL_IFS_EIFS, 20);

	REG_WRITE(ah, AR_D_FPCTL, 0x10|qnum);

	REG_WRITE(ah, AR_TIME_OUT, 0x00000400);

	REG_WRITE(ah, AR_DRETRY_LIMIT(qnum), 0xffffffff);

	REG_SET_BIT(ah, AR_QMISC(qnum), AR_Q_MISC_DCU_EARLY_TERM_REQ);

}



static void ar9002_hw_tx99_stop(struct ath_hw *ah)

{

	REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);

}



void ar9002_hw_attach_phy_ops(struct ath_hw *ah)

{

	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
@@ -701,6 +721,8 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah) 
#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT

	ops->set_bt_ant_diversity = ar9002_hw_set_bt_ant_diversity;

#endif

	ops->tx99_start = ar9002_hw_tx99_start;

	ops->tx99_stop = ar9002_hw_tx99_stop;



	ar9002_hw_set_nf_limits(ah);

}

drivers/net/wireless/ath/ath9k/ar9003_phy.c

+95 −0
Original line number Diff line number Diff line
@@ -1617,6 +1617,98 @@ static void ar9003_hw_spectral_scan_wait(struct ath_hw *ah) 
	}

}



static void ar9003_hw_tx99_start(struct ath_hw *ah, u32 qnum)

{

	REG_SET_BIT(ah, AR_PHY_TEST, PHY_AGC_CLR);

	REG_SET_BIT(ah, 0x9864, 0x7f000);

	REG_SET_BIT(ah, 0x9924, 0x7f00fe);

	REG_CLR_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);

	REG_WRITE(ah, AR_CR, AR_CR_RXD);

	REG_WRITE(ah, AR_DLCL_IFS(qnum), 0);

	REG_WRITE(ah, AR_D_GBL_IFS_SIFS, 20); /* 50 OK */

	REG_WRITE(ah, AR_D_GBL_IFS_EIFS, 20);

	REG_WRITE(ah, AR_TIME_OUT, 0x00000400);

	REG_WRITE(ah, AR_DRETRY_LIMIT(qnum), 0xffffffff);

	REG_SET_BIT(ah, AR_QMISC(qnum), AR_Q_MISC_DCU_EARLY_TERM_REQ);

}



static void ar9003_hw_tx99_stop(struct ath_hw *ah)

{

	REG_CLR_BIT(ah, AR_PHY_TEST, PHY_AGC_CLR);

	REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);

}



static void ar9003_hw_tx99_set_txpower(struct ath_hw *ah, u8 txpower)

{

	static s16 p_pwr_array[ar9300RateSize] = { 0 };

	unsigned int i;



	if (txpower <= MAX_RATE_POWER) {

		for (i = 0; i < ar9300RateSize; i++)

			p_pwr_array[i] = txpower;

	} else {

		for (i = 0; i < ar9300RateSize; i++)

			p_pwr_array[i] = MAX_RATE_POWER;

	}



	REG_WRITE(ah, 0xa458, 0);



	REG_WRITE(ah, 0xa3c0,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24],  8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24],  0));

	REG_WRITE(ah, 0xa3c4,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_54],  24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_48],  16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_36],   8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_6_24], 0));

	REG_WRITE(ah, 0xa3c8,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L],  0));

	REG_WRITE(ah, 0xa3cc,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11S],   24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_11L],   16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_5S],     8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_LEGACY_1L_5L],  0));

	REG_WRITE(ah, 0xa3d0,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_5],  24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_4],  16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_1_3_9_11_17_19], 8)|

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_0_8_16], 0));

	REG_WRITE(ah, 0xa3d4,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_13], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_12], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_7],   8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_6],   0));

	REG_WRITE(ah, 0xa3e4,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_21], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_20], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_15],  8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_14],  0));

	REG_WRITE(ah, 0xa3e8,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_23], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_22], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_23],  8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT20_22],  0));

	REG_WRITE(ah, 0xa3d8,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_5], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_4], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_1_3_9_11_17_19], 8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_0_8_16], 0));

	REG_WRITE(ah, 0xa3dc,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_13], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_12], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_7],   8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_6],   0));

	REG_WRITE(ah, 0xa3ec,

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_21], 24) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_20], 16) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_15],  8) |

		  ATH9K_POW_SM(p_pwr_array[ALL_TARGET_HT40_14],  0));

}



void ar9003_hw_attach_phy_ops(struct ath_hw *ah)

{

	struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
@@ -1656,6 +1748,9 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah) 
#ifdef CONFIG_ATH9K_BTCOEX_SUPPORT

	ops->set_bt_ant_diversity = ar9003_hw_set_bt_ant_diversity;

#endif

	ops->tx99_start = ar9003_hw_tx99_start;

	ops->tx99_stop = ar9003_hw_tx99_stop;

	ops->tx99_set_txpower = ar9003_hw_tx99_set_txpower;



	ar9003_hw_set_nf_limits(ah);

	ar9003_hw_set_radar_conf(ah);

drivers/net/wireless/ath/ath9k/ath9k.h

+10 −0
Original line number Diff line number Diff line
@@ -778,6 +778,11 @@ struct ath_softc { 
	enum spectral_mode spectral_mode;

	struct ath_spec_scan spec_config;



	struct ieee80211_vif *tx99_vif;

	struct sk_buff *tx99_skb;

	bool tx99_state;

	s16 tx99_power;



#ifdef CONFIG_PM_SLEEP

	atomic_t wow_got_bmiss_intr;

	atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
@@ -941,6 +946,11 @@ struct fft_sample_ht20_40 { 
	u8 data[SPECTRAL_HT20_40_NUM_BINS];

} __packed;



int ath9k_tx99_init(struct ath_softc *sc);

void ath9k_tx99_deinit(struct ath_softc *sc);

int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,

		    struct ath_tx_control *txctl);



void ath9k_tasklet(unsigned long data);

int ath_cabq_update(struct ath_softc *);

drivers/net/wireless/ath/ath9k/debug.c

+118 −0
Original line number Diff line number Diff line
@@ -1050,6 +1050,9 @@ static ssize_t write_file_spec_scan_ctl(struct file *file, 
	char buf[32];

	ssize_t len;



	if (config_enabled(CONFIG_ATH9K_TX99))

		return -EOPNOTSUPP;



	len = min(count, sizeof(buf) - 1);

	if (copy_from_user(buf, user_buf, len))

		return -EFAULT;
@@ -1775,6 +1778,111 @@ void ath9k_deinit_debug(struct ath_softc *sc) 
	}

}



static ssize_t read_file_tx99(struct file *file, char __user *user_buf,

			      size_t count, loff_t *ppos)

{

	struct ath_softc *sc = file->private_data;

	char buf[3];

	unsigned int len;



	len = sprintf(buf, "%d\n", sc->tx99_state);

	return simple_read_from_buffer(user_buf, count, ppos, buf, len);

}



static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,

			       size_t count, loff_t *ppos)

{

	struct ath_softc *sc = file->private_data;

	struct ath_common *common = ath9k_hw_common(sc->sc_ah);

	char buf[32];

	bool start;

	ssize_t len;

	int r;



	if (sc->nvifs > 1)

		return -EOPNOTSUPP;



	len = min(count, sizeof(buf) - 1);

	if (copy_from_user(buf, user_buf, len))

		return -EFAULT;



	if (strtobool(buf, &start))

		return -EINVAL;



	if (start == sc->tx99_state) {

		if (!start)

			return count;

		ath_dbg(common, XMIT, "Resetting TX99\n");

		ath9k_tx99_deinit(sc);

	}



	if (!start) {

		ath9k_tx99_deinit(sc);

		return count;

	}



	r = ath9k_tx99_init(sc);

	if (r)

		return r;



	return count;

}



static const struct file_operations fops_tx99 = {

	.read = read_file_tx99,

	.write = write_file_tx99,

	.open = simple_open,

	.owner = THIS_MODULE,

	.llseek = default_llseek,

};



static ssize_t read_file_tx99_power(struct file *file,

				    char __user *user_buf,

				    size_t count, loff_t *ppos)

{

	struct ath_softc *sc = file->private_data;

	char buf[32];

	unsigned int len;



	len = sprintf(buf, "%d (%d dBm)\n",

		      sc->tx99_power,

		      sc->tx99_power / 2);



	return simple_read_from_buffer(user_buf, count, ppos, buf, len);

}



static ssize_t write_file_tx99_power(struct file *file,

				     const char __user *user_buf,

				     size_t count, loff_t *ppos)

{

	struct ath_softc *sc = file->private_data;

	int r;

	u8 tx_power;



	r = kstrtou8_from_user(user_buf, count, 0, &tx_power);

	if (r)

		return r;



	if (tx_power > MAX_RATE_POWER)

		return -EINVAL;



	sc->tx99_power = tx_power;



	ath9k_ps_wakeup(sc);

	ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power);

	ath9k_ps_restore(sc);



	return count;

}



static const struct file_operations fops_tx99_power = {

	.read = read_file_tx99_power,

	.write = write_file_tx99_power,

	.open = simple_open,

	.owner = THIS_MODULE,

	.llseek = default_llseek,

};



int ath9k_init_debug(struct ath_hw *ah)

{

	struct ath_common *common = ath9k_hw_common(ah);
@@ -1866,5 +1974,15 @@ int ath9k_init_debug(struct ath_hw *ah) 
	debugfs_create_file("btcoex", S_IRUSR, sc->debug.debugfs_phy, sc,

			    &fops_btcoex);

#endif

	if (config_enabled(CONFIG_ATH9K_TX99) &&

	    AR_SREV_9300_20_OR_LATER(ah)) {

		debugfs_create_file("tx99", S_IRUSR | S_IWUSR,

				    sc->debug.debugfs_phy, sc,

				    &fops_tx99);

		debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR,

				    sc->debug.debugfs_phy, sc,

				    &fops_tx99_power);

	}



	return 0;

}