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Commit 89f821a2 authored by Vikram Mulukutla's avatar Vikram Mulukutla
Browse files

ARM: dts: msm: Add the MSM8996 V3 CPU frequency plan 



Update the frequency plan for the MSM8996V3 CPU clocks.
Note that we only support frequencies upto the nominal
FMAX presently.

Change-Id: Ie635ebb5482c4d89a6ef77b6fc84547b636f91f7
Signed-off-by: default avatarVikram Mulukutla <markivx@codeaurora.org>
parent d908e2ae

arch/arm/boot/dts/qcom/msm8996-v3.dtsi

+49 −0
Original line number Diff line number Diff line
@@ -120,3 +120,52 @@ 
			< 489600 150000000 0xffffffff>, /* 1080p @ 60 */

			< 244800  75000000 0xffffffff>; /* 1080p @ 30 */

};



&clock_cpu {

		qcom,compatible = "cpu-clock-8996-v3";

		/* Nominal FMAXes only until characterization completes. */

		qcom,pwrcl-speedbin0-v0 =

			<          0  0 >,

			<  307200000  1 >,

			<  422400000  2 >,

			<  480000000  3 >,

			<  556800000  4 >,

			<  652800000  5 >,

			<  729600000  6 >,

			<  844800000  7 >,

			<  960000000  8 >,

			< 1036800000  9 >,

			< 1113600000 10 >,

			< 1190400000 11 >,

			< 1228800000 12 >;

		qcom,perfcl-speedbin0-v0 =

			<          0  0 >,

			<  307200000  1 >,

			<  403200000  2 >,

			<  480000000  3 >,

			<  556800000  4 >,

			<  652800000  5 >,

			<  729600000  6 >,

			<  806400000  7 >,

			<  883200000  8 >,

			<  940800000  9 >,

			< 1036800000 10 >,

			< 1113600000 11 >,

			< 1190400000 12 >,

			< 1248000000 13 >;

		qcom,cbf-speedbin0-v0 =

			<	   0  0 >,

			<  307200000  1 >,

			<  384000000  2 >,

			<  460800000  3 >,

			<  537600000  4 >,

			<  595200000  5 >,

			<  672000000  6 >,

			<  748800000  7 >,

			<  825600000  8 >,

			<  902400000  9 >,

			<  979200000 10 >,

			< 1056000000 11 >,

			< 1132800000 12 >,

			< 1190400000 13 >;

};

arch/arm/boot/dts/qcom/msm8996.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -783,6 +783,7 @@ 
		vdd-cbf-supply = <&apc0_cbf_vreg>;

		vdd-dig-supply = <&pm8994_s2_corner_ao>;

		cbf-dev = <&m4m_cache>;

		/* please look at msm8996-v3.dtsi for the v3 plan */

		qcom,pwrcl-speedbin0-v0 =

			<          0  0 >,

			<  307200000  3 >,