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Commit 897ea18d authored by Catalin Marinas's avatar Catalin Marinas Committed by Imran Khan
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arm64: cache: change ARCH_DMA_MINALIGN and L1_CACHE_SHIFT values



This reverts commit 2f1c2747
and also sets ARM_DMA_MINALIGN to 128.
ARCH_DMA_MINALIGN is dependent on L1_CACHE_SHIFT but it should
be set to maximum *known* cache line size on ARMv8 systems to
avoid DMA coherecy issues. So setting ARM_DMA_MINALIGN to 128.

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Change-Id: I3fcdba32d0bf574f0af7c924ae926dd47df75e07
Patch-mainline: linux-kernel @ 21/03/16, 17:14:03
Signed-off-by: default avatarImran Khan <kimran@codeaurora.org>
parent c1b67407
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