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Commit 895287c0 authored by Hidetoshi Seto's avatar Hidetoshi Seto Committed by H. Peter Anvin
Browse files

x86, mce: squash mce_intel.c into therm_throt.c 



move intel_init_thermal() into therm_throt.c

Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent a65c88dd

arch/x86/kernel/cpu/mcheck/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -9,4 +9,4 @@ obj-$(CONFIG_X86_MCE_NONFATAL) += non-fatal.o 
obj-$(CONFIG_X86_MCE_THRESHOLD) += threshold.o

obj-$(CONFIG_X86_MCE_INJECT)	+= mce-inject.o



obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o mce_intel.o
 
obj-$(CONFIG_X86_THERMAL_VECTOR) += therm_throt.o

arch/x86/kernel/cpu/mcheck/mce_intel.c

deleted100644 → 0
+0 −73
Original line number Diff line number Diff line 
/*

 * Common code for Intel machine checks

 */

#include <linux/interrupt.h>

#include <linux/kernel.h>

#include <linux/types.h>

#include <linux/init.h>

#include <linux/smp.h>



#include <asm/therm_throt.h>

#include <asm/processor.h>

#include <asm/system.h>

#include <asm/apic.h>

#include <asm/mce.h>

#include <asm/msr.h>



void intel_init_thermal(struct cpuinfo_x86 *c)

{

	unsigned int cpu = smp_processor_id();

	int tm2 = 0;

	u32 l, h;



	/* Thermal monitoring depends on ACPI and clock modulation*/

	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))

		return;



	/*

	 * First check if its enabled already, in which case there might

	 * be some SMM goo which handles it, so we can't even put a handler

	 * since it might be delivered via SMI already:

	 */

	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	h = apic_read(APIC_LVTTHMR);

	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {

		printk(KERN_DEBUG

		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);

		return;

	}



	if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))

		tm2 = 1;



	/* Check whether a vector already exists */

	if (h & APIC_VECTOR_MASK) {

		printk(KERN_DEBUG

		       "CPU%d: Thermal LVT vector (%#x) already installed\n",

		       cpu, (h & APIC_VECTOR_MASK));

		return;

	}



	/* We'll mask the thermal vector in the lapic till we're ready: */

	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;

	apic_write(APIC_LVTTHMR, h);



	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);

	wrmsr(MSR_IA32_THERM_INTERRUPT,

		l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);



	intel_set_thermal_handler();



	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);



	/* Unmask the thermal vector: */

	l = apic_read(APIC_LVTTHMR);

	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);



	printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",

	       cpu, tm2 ? "TM2" : "TM1");



	/* enable thermal throttle processing */

	atomic_set(&therm_throt_en, 1);

}

arch/x86/kernel/cpu/mcheck/therm_throt.c

+66 −0
Original line number Diff line number Diff line
@@ -16,13 +16,21 @@ 
#include <linux/interrupt.h>

#include <linux/notifier.h>

#include <linux/jiffies.h>

#include <linux/kernel.h>

#include <linux/percpu.h>

#include <linux/sysdev.h>

#include <linux/types.h>

#include <linux/init.h>

#include <linux/smp.h>

#include <linux/cpu.h>



#include <asm/therm_throt.h>

#include <asm/processor.h>

#include <asm/system.h>

#include <asm/apic.h>

#include <asm/idle.h>

#include <asm/mce.h>

#include <asm/msr.h>



/* How long to wait between reporting thermal events */

#define CHECK_INTERVAL		(300 * HZ)
@@ -227,3 +235,61 @@ void intel_set_thermal_handler(void) 
{

	smp_thermal_vector = intel_thermal_interrupt;

}



void intel_init_thermal(struct cpuinfo_x86 *c)

{

	unsigned int cpu = smp_processor_id();

	int tm2 = 0;

	u32 l, h;



	/* Thermal monitoring depends on ACPI and clock modulation*/

	if (!cpu_has(c, X86_FEATURE_ACPI) || !cpu_has(c, X86_FEATURE_ACC))

		return;



	/*

	 * First check if its enabled already, in which case there might

	 * be some SMM goo which handles it, so we can't even put a handler

	 * since it might be delivered via SMI already:

	 */

	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	h = apic_read(APIC_LVTTHMR);

	if ((l & MSR_IA32_MISC_ENABLE_TM1) && (h & APIC_DM_SMI)) {

		printk(KERN_DEBUG

		       "CPU%d: Thermal monitoring handled by SMI\n", cpu);

		return;

	}



	if (cpu_has(c, X86_FEATURE_TM2) && (l & MSR_IA32_MISC_ENABLE_TM2))

		tm2 = 1;



	/* Check whether a vector already exists */

	if (h & APIC_VECTOR_MASK) {

		printk(KERN_DEBUG

		       "CPU%d: Thermal LVT vector (%#x) already installed\n",

		       cpu, (h & APIC_VECTOR_MASK));

		return;

	}



	/* We'll mask the thermal vector in the lapic till we're ready: */

	h = THERMAL_APIC_VECTOR | APIC_DM_FIXED | APIC_LVT_MASKED;

	apic_write(APIC_LVTTHMR, h);



	rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);

	wrmsr(MSR_IA32_THERM_INTERRUPT,

		l | (THERM_INT_LOW_ENABLE | THERM_INT_HIGH_ENABLE), h);



	intel_set_thermal_handler();



	rdmsr(MSR_IA32_MISC_ENABLE, l, h);

	wrmsr(MSR_IA32_MISC_ENABLE, l | MSR_IA32_MISC_ENABLE_TM1, h);



	/* Unmask the thermal vector: */

	l = apic_read(APIC_LVTTHMR);

	apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);



	printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",

	       cpu, tm2 ? "TM2" : "TM1");



	/* enable thermal throttle processing */

	atomic_set(&therm_throt_en, 1);

}