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Commit 88a590ac authored by Mitchel Humpherys's avatar Mitchel Humpherys Committed by Matt Wagantall
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iommu/arm-smmu: do a single 64-bit write for ATOS 



Hardware requires that the ATOS command be issued with a single 64-bit
write instead of two 32-bit writes as we're currently doing.  Fix this.

Change-Id: I43104c89c2f27b75d1176c8cbcd214666321244f
Signed-off-by: default avatarMitchel Humpherys <mitchelh@codeaurora.org>
parent 7a42afd3

drivers/iommu/arm-smmu.c

+2 −4
Original line number Diff line number Diff line
@@ -1902,10 +1902,8 @@ static phys_addr_t arm_smmu_iova_to_phys_hard(struct iommu_domain *domain, 
		u32 reg = iova & ~0xfff;

		writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO);

	} else {

		u32 reg = iova & ~0xfff;

		writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO);

		reg = (iova & ~0xfff) >> 32;

		writel_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_HI);

		u64 reg = iova & ~0xfff;

		writeq_relaxed(reg, cb_base + ARM_SMMU_CB_ATS1PR_LO);

	}



	if (readl_poll_timeout_atomic(cb_base + ARM_SMMU_CB_ATSR, tmp,