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Commit 886cda41 authored by Shawn Guo's avatar Shawn Guo
Browse files

ARM: imx6q: add the missing esai_ahb clock 



The esai_ahb clock is derived from ahb and used to provide ESAI the
capability of register accessing and FSYS clock source for I2S clocks
dividing.  The gate bits of this esai_ahb clock are shared with the
esai clock -- the baud clock, so we need to call imx_clk_gate2_shared()
for these two clocks.

Signed-off-by: default avatarNicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent f9f28cdf

Documentation/devicetree/bindings/clock/imx6q-clock.txt

+1 −0
Original line number Diff line number Diff line
@@ -220,6 +220,7 @@ clocks and IDs. 
	lvds2_sel		205

	lvds1_gate		206

	lvds2_gate		207

	esai_ahb		208



Examples:

arch/arm/mach-imx/clk-imx6q.c

+5 −2
Original line number Diff line number Diff line
@@ -107,7 +107,7 @@ enum mx6q_clks { 
	sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,

	usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,

	spdif, cko2_sel, cko2_podf, cko2, cko, vdoa, pll4_audio_div,

	lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, clk_max

	lvds1_sel, lvds2_sel, lvds1_gate, lvds2_gate, esai_ahb, clk_max

};



static struct clk *clk[clk_max];
@@ -140,6 +140,8 @@ static struct clk_div_table video_div_table[] = { 
	{ /* sentinel */ }

};



static unsigned int share_count_esai;



static void __init imx6q_clocks_init(struct device_node *ccm_node)

{

	struct device_node *np;
@@ -358,7 +360,8 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) 
	else

		clk[ecspi5] = imx_clk_gate2("ecspi5",      "ecspi_root",        base + 0x6c, 8);

	clk[enet]         = imx_clk_gate2("enet",          "ipg",               base + 0x6c, 10);

	clk[esai]         = imx_clk_gate2("esai",          "esai_podf",         base + 0x6c, 16);

	clk[esai]         = imx_clk_gate2_shared("esai",   "esai_podf",         base + 0x6c, 16, &share_count_esai);

	clk[esai_ahb]     = imx_clk_gate2_shared("esai_ahb", "ahb",             base + 0x6c, 16, &share_count_esai);

	clk[gpt_ipg]      = imx_clk_gate2("gpt_ipg",       "ipg",               base + 0x6c, 20);

	clk[gpt_ipg_per]  = imx_clk_gate2("gpt_ipg_per",   "ipg_per",           base + 0x6c, 22);

	if (cpu_is_imx6dl())