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Commit 87646654 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Set the high bank bit value for GPU targets"

parents 803a067a 44264762

arch/arm/boot/dts/qcom/msm8937-gpu.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -55,6 +55,8 @@ 
		qcom,idle-timeout = <80>; //msecs

		qcom,strtstp-sleepwake;



		qcom,highest-bank-bit = <14>;



		clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>,

			<&clock_gcc clk_gcc_oxili_ahb_clk>,

			<&clock_gcc clk_gcc_bimc_gfx_clk>,

arch/arm/boot/dts/qcom/msm8952-gpu.dtsi

+3 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -61,6 +61,8 @@ 
		qcom,idle-timeout = <80>; //msecs

		qcom,strtstp-sleepwake;



		qcom,highest-bank-bit = <14>;



		clocks = <&clock_gcc clk_gcc_oxili_gfx3d_clk>,

			<&clock_gcc clk_gcc_oxili_ahb_clk>,

			<&clock_gcc clk_gcc_oxili_gmem_clk>,

arch/arm/boot/dts/qcom/msm8996-gpu.dtsi

+3 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.

/* Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -75,6 +75,8 @@ 
		qcom,deep-nap-timeout = <20>; //msecs

		qcom,strtstp-sleepwake;



		qcom,highest-bank-bit = <15>;



		/* Trace bus */

		coresight-id = <300>;

		coresight-name = "coresight-gfx";

arch/arm/boot/dts/qcom/msmtitanium-gpu.dtsi

+2 −0
Original line number Diff line number Diff line
@@ -56,6 +56,8 @@ 
		qcom,idle-timeout = <80>; //msecs

		qcom,strtstp-sleepwake;



		qcom,highest-bank-bit = <14>;



		clocks = <&clock_gcc_gfx clk_gcc_oxili_gfx3d_clk>,

			<&clock_gcc_gfx clk_gcc_oxili_ahb_clk>,

			<&clock_gcc_gfx clk_gcc_bimc_gfx_clk>,