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Commit 876292d6 authored by Gilles Chanteperdrix's avatar Gilles Chanteperdrix Committed by Shawn Guo
Browse files

ARM: imx: factor device tree timer initialization 



Signed-off-by: default avatarGilles Chanteperdrix <gilles.chanteperdrix@xenomai.org>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent bc02cd69

arch/arm/mach-imx/clk-imx25.c

+1 −8
Original line number Diff line number Diff line
@@ -304,8 +304,6 @@ int __init mx25_clocks_init(void) 
int __init mx25_clocks_init_dt(void)

{

	struct device_node *np;

	void __iomem *base;

	int irq;

	unsigned long osc_rate = 24000000;



	/* retrieve the freqency of fixed clocks from device tree */
@@ -325,12 +323,7 @@ int __init mx25_clocks_init_dt(void) 


	__mx25_clocks_init(osc_rate);



	np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt");

	base = of_iomap(np, 0);

	WARN_ON(!base);

	irq = irq_of_parse_and_map(np, 0);



	mxc_timer_init(base, irq);

	mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt"));



	return 0;

}

arch/arm/mach-imx/clk-imx51-imx53.c

+4 −14
Original line number Diff line number Diff line
@@ -322,9 +322,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil, 


static void __init mx50_clocks_init(struct device_node *np)

{

	void __iomem *base;

	unsigned long r;

	int i, irq;

	int i;



	clk[IMX5_CLK_PLL1_SW]		= imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);

	clk[IMX5_CLK_PLL2_SW]		= imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@@ -372,11 +371,7 @@ static void __init mx50_clocks_init(struct device_node *np) 
	r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);

	clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);



	np = of_find_compatible_node(NULL, NULL, "fsl,imx50-gpt");

	base = of_iomap(np, 0);

	WARN_ON(!base);

	irq = irq_of_parse_and_map(np, 0);

	mxc_timer_init(base, irq);

	mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx50-gpt"));

}

CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init);
@@ -491,9 +486,8 @@ CLK_OF_DECLARE(imx51_ccm, "fsl,imx51-ccm", mx51_clocks_init_dt); 


static void __init mx53_clocks_init(struct device_node *np)

{

	int i, irq;

	int i;

	unsigned long r;

	void __iomem *base;



	clk[IMX5_CLK_PLL1_SW]		= imx_clk_pllv2("pll1_sw", "osc", MX53_DPLL1_BASE);

	clk[IMX5_CLK_PLL2_SW]		= imx_clk_pllv2("pll2_sw", "osc", MX53_DPLL2_BASE);
@@ -590,10 +584,6 @@ static void __init mx53_clocks_init(struct device_node *np) 
	r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000);

	clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r);



	np = of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt");

	base = of_iomap(np, 0);

	WARN_ON(!base);

	irq = irq_of_parse_and_map(np, 0);

	mxc_timer_init(base, irq);

	mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx53-gpt"));

}

CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init);

arch/arm/mach-imx/clk-imx6q.c

+2 −6
Original line number Diff line number Diff line
@@ -144,7 +144,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) 
{

	struct device_node *np;

	void __iomem *base;

	int i, irq;

	int i;

	int ret;



	clk[dummy] = imx_clk_fixed("dummy", 0);
@@ -489,10 +489,6 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) 
	/* Set initial power mode */

	imx6q_set_lpm(WAIT_CLOCKED);



	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");

	base = of_iomap(np, 0);

	WARN_ON(!base);

	irq = irq_of_parse_and_map(np, 0);

	mxc_timer_init(base, irq);

	mxc_timer_init_dt(of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt"));

}

CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);

arch/arm/mach-imx/clk-imx6sl.c

+1 −5
Original line number Diff line number Diff line
@@ -169,7 +169,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) 
{

	struct device_node *np;

	void __iomem *base;

	int irq;

	int i;

	int ret;
@@ -385,9 +384,6 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) 
	imx6q_set_lpm(WAIT_CLOCKED);



	np = of_find_compatible_node(NULL, NULL, "fsl,imx6sl-gpt");

	base = of_iomap(np, 0);

	WARN_ON(!base);

	irq = irq_of_parse_and_map(np, 0);

	mxc_timer_init(base, irq);

	mxc_timer_init_dt(np);

}

CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);

arch/arm/mach-imx/common.h

+2 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ struct irq_data; 
struct platform_device;

struct pt_regs;

struct clk;

struct device_node;

enum mxc_cpu_pwr_mode;



void mx1_map_io(void);
@@ -56,6 +57,7 @@ void imx51_init_late(void); 
void imx53_init_late(void);

void epit_timer_init(void __iomem *base, int irq);

void mxc_timer_init(void __iomem *, int);

void mxc_timer_init_dt(struct device_node *);

int mx1_clocks_init(unsigned long fref);

int mx21_clocks_init(unsigned long lref, unsigned long fref);

int mx25_clocks_init(void);