Merge "power: introduce SMB138X charger driver"

Qualcomm Technologies, Inc. I2C PMIC Interrupt Controller

Platform Independent Bindings

The I2C PMIC Controller is used by multi-function PMIC devices which communicate

over the I2C bus. An I2C PMIC controller node typically contains one or more

child nodes representing the device's peripherals. Each of the peripherals

typically has its own driver on the platform bus and will be enumerated by this

controller. The controller exposes a regmap to the peripherals to communicate

over the I2C bus.

The controller also controls interrupts for all of the peripherals on the bus.

The controller takes a summary interrupt, deciphers which peripheral triggered

the interrupt, and which of the peripheral's interrupts were triggered. Finally,

it calls the handlers for each of the virtual interrupts that were registered.

This document describes the common platform independent bindings that apply

to all I2C PMIC interrupt controllers.

========================================

First Level Nodes - I2C PMIC Controllers

========================================

Platform independent properties:

- compatible

	Usage:      required

	Value type: <string>

	Definition: Must be "qcom,i2c-pmic".

- reg

	Usage:      required

	Value type: <u32>

	Definition: 7-bit I2C address of the device.

- interrupt-parent

	Usage:      required

	Value type: <phandle>

	Definition: phandle of the interrupt controller which services the

		    summary interrupt.

- interrupts

	Usage:      required

	Value type: <prop-encoded-array>

	Definition: Summary interrupt specifier.

- interrupt-controller

	Usage:      required

	Value type: <empty>

	Definition: Boolean flag which indicates this device node is an

		    interrupt controller.

- #interrupt-cells

	Usage:      required

	Value type: <u32>

	Definition: Number of cells to encode an interrupt source.

- qcom,periph-map

	Usage:      required

	Value type: <prop-encoded-array>

	Definition: A list of u32 arrays. This provides a mapping between the

		    summary status register bits and peripheral addresses.

		    The number of arrays should match the number of summary

		    registers with up to 8 elements each. One element per bit

		    of the summary status register in order from the least

		    sigificant bit to the most significant bit.

- pinctrl-names

	Usage:      optional

	Value type: <string-list>

	Definition: Should be "default".

		    Please refer to pinctrl-bindings.txt

- pinctrl-0

	Usage:      optional

	Value type: <phandle-list>

	Definition: phandle of the pin configuration.

		    Please refer to pinctrl-bindings.txt

=======

Example

=======

&i2c_3 {

	status = "ok";

	qcom,smb138x@8 {

		compatible = "qcom,i2c-pmic";

		reg = <0x8>;

		interrupt-parent = <&tlmm_pinmux>;

		interrupts = <83 0>;

		interrupt-controller;

		#interrupt-cells = <3>;

		pinctrl-names = "default";

		pinctrl-0 = <&smb_stat_active>;

		#address-cells = <1>;

		#size-cells = <0>;

		qcom,periph-map = <0x10 0x11 0x12 0x13 0x14 0x16 0x36>;

	};

};

Qualcomm Technologies, Inc. SMB138X Charger Specific Bindings

SMB138X Charger is an efficient programmable battery charger capable of charging

a high-capacity lithium-ion battery over micro-USB or USB Type-C ultrafast with

Quick Charge 2.0, Quick Charge 3.0 support. Wireless charging features full

A4WP Rezence 1.2, WPC 1.2, and PMA support.

=======================

Required Node Structure

=======================

SMB138X Charger must be described in two levels of devices nodes.

==================================

First Level Node - SMB138X Charger

==================================

Charger specific properties:

- compatible

  Usage:      required

  Value type: <string>

  Definition: String which indicates the charging mode. Can be one of the

	      following:

              Standalone/Parallel Master	- "qcom,smb138x-charger"

	      Parallel Slave			- "qcom,smb138x-parallel-slave"

- qcom,suspend-input

  Usage:      optional

  Value type: <empty>

  Definition: Boolean flag which indicates that the charger should not draw

	      current from any of its input sources (USB, DC).

- qcom,fcc-max-ua

  Usage:      optional

  Value type: <u32>

  Definition: Specifies the maximum fast charge current in micro-amps.

- qcom,usb-icl-ua

  Usage:      optional

  Value type: <u32>

  Definition: Specifies the USB input current limit in micro-amps.

- qcom,dc-icl-ua

  Usage:      optional

  Value type: <u32>

  Definition: Specifies the DC input current limit in micro-amps.

- qcom,micro-usb

  Usage:      optional

  Value type: <empty>

  Definition: Boolean flag which indicates that the connector type is micro usb.

================================================

Second Level Nodes - SMB138X Charger Peripherals

================================================

Peripheral specific properties:

- reg

  Usage:      required

  Value type: <prop-encoded-array>

  Definition: Address and size of the peripheral's register block.

- interrupts

  Usage:      required

  Value type: <prop-encoded-array>

  Definition: Peripheral interrupt specifier.

- interrupt-names

  Usage:      required

  Value type: <stringlist>

  Definition: Interrupt names.  This list must match up 1-to-1 with the

	      interrupts specified in the 'interrupts' property.

=======================================

Second Level Nodes - SMB138X Regulators

=======================================

The following regulator nodes are supported:

"qcom,smb138x-vbus"	- Regulator for enabling VBUS

- regulator-name

  Usage:      required

  Value type: <string>

  Definition: Specifies the name for this regulator.

=======

Example

=======

smb138x_charger: qcom,smb138x-charger {

	compatible = "qcom,qpnp-smb138x-charger";

	#address-cells = <1>;

	#size-cells = <1>;

	qcom,suspend-input;

	qcom,chgr@1000 {

		reg = <0x1000 0x100>;

		interrupts =    <0x10 0x0 IRQ_TYPE_EDGE_BOTH>,

				<0x10 0x1 IRQ_TYPE_EDGE_BOTH>,

				<0x10 0x2 IRQ_TYPE_EDGE_BOTH>,

				<0x10 0x3 IRQ_TYPE_EDGE_BOTH>,

				<0x10 0x4 IRQ_TYPE_EDGE_BOTH>;

		interrupt-names =       "chg-error",

					"chg-state-change",

					"step-chg-state-change",

					"step-chg-soc-update-fail",

					"step-chg-soc-update-request";

	};

	qcom,otg@1100 {

		reg = <0x1100 0x100>;

		interrupts =    <0x11 0x0 IRQ_TYPE_EDGE_BOTH>,

				<0x11 0x1 IRQ_TYPE_EDGE_BOTH>,

				<0x11 0x2 IRQ_TYPE_EDGE_BOTH>,

				<0x11 0x3 IRQ_TYPE_EDGE_BOTH>;

		interrupt-names =       "otg-fail",

					"otg-overcurrent",

					"otg-oc-dis-sw-sts",

					"testmode-change-detect";

	};

	qcom,bat-if@1200 {

		reg = <0x1200 0x100>;

		interrupts =    <0x12 0x0 IRQ_TYPE_EDGE_BOTH>,

				<0x12 0x1 IRQ_TYPE_EDGE_BOTH>,

				<0x12 0x2 IRQ_TYPE_EDGE_BOTH>,

				<0x12 0x3 IRQ_TYPE_EDGE_BOTH>,

				<0x12 0x4 IRQ_TYPE_EDGE_BOTH>,

				<0x12 0x5 IRQ_TYPE_EDGE_BOTH>;

		interrupt-names =       "bat-temp",

					"bat-ocp",

					"bat-ov",

					"bat-low",

					"bat-therm-or-id-missing",

					"bat-terminal-missing";

	};

	qcom,usb-chgpth@1300 {

		reg = <0x1300 0x100>;

		interrupts =    <0x13 0x0 IRQ_TYPE_EDGE_BOTH>,

				<0x13 0x1 IRQ_TYPE_EDGE_BOTH>,

				<0x13 0x2 IRQ_TYPE_EDGE_BOTH>,

				<0x13 0x3 IRQ_TYPE_EDGE_BOTH>,

				<0x13 0x4 IRQ_TYPE_EDGE_BOTH>,

				<0x13 0x5 IRQ_TYPE_EDGE_BOTH>,

				<0x13 0x6 IRQ_TYPE_EDGE_BOTH>,

				<0x13 0x7 IRQ_TYPE_EDGE_BOTH>;

		interrupt-names =       "usbin-collapse",

					"usbin-lt-3p6v",

					"usbin-uv",

					"usbin-ov",

					"usbin-plugin",

					"usbin-src-change",

					"usbin-icl-change",

					"type-c-change";

	};

	qcom,dc-chgpth@1400 {

		reg = <0x1400 0x100>;

		interrupts =    <0x14 0x0 IRQ_TYPE_EDGE_BOTH>,

				<0x14 0x1 IRQ_TYPE_EDGE_BOTH>,

				<0x14 0x2 IRQ_TYPE_EDGE_BOTH>,

				<0x14 0x3 IRQ_TYPE_EDGE_BOTH>,

				<0x14 0x4 IRQ_TYPE_EDGE_BOTH>,

				<0x14 0x5 IRQ_TYPE_EDGE_BOTH>,

				<0x14 0x6 IRQ_TYPE_EDGE_BOTH>;

		interrupt-names =       "dcin-collapse",

					"dcin-lt-3p6v",

					"dcin-uv",

					"dcin-ov",

					"dcin-plugin",

					"div2-en-dg",

					"dcin-icl-change";

	};

	qcom,chgr-misc@1600 {

		reg = <0x1600 0x100>;

		interrupts =    <0x16 0x0 IRQ_TYPE_EDGE_BOTH>,

				<0x16 0x1 IRQ_TYPE_EDGE_BOTH>,

				<0x16 0x2 IRQ_TYPE_EDGE_BOTH>,

				<0x16 0x3 IRQ_TYPE_EDGE_BOTH>,

				<0x16 0x4 IRQ_TYPE_EDGE_BOTH>,

				<0x16 0x5 IRQ_TYPE_EDGE_BOTH>,

				<0x16 0x6 IRQ_TYPE_EDGE_BOTH>,

				<0x16 0x7 IRQ_TYPE_EDGE_BOTH>;

		interrupt-names =       "wdog-snarl",

					"wdog-bark",

					"aicl-fail",

					"aicl-done",

					"high-duty-cycle",

					"input-current-limiting",

					"temperature-change",

					"switcher-power-ok";

	};

};

	  Say M here if you want to include support for the SPMI PMIC

	  series as a module.  The module will be called "qcom-spmi-pmic".

config MFD_I2C_PMIC

	tristate "QTI I2C PMICs"

	depends on OF

	depends on I2C

	select IRQ_DOMAIN

	select REGMAP_I2C

	help

	  This enables support for controlling Qualcomm Technologies, Inc.

	  PMICs over I2C. The driver controls interrupts, and provides register

	  access for all of the device's peripherals.

	  Say M here if you want to include support for the I2C PMIC series as

	  a module. The module will be called "qcom-i2c-pmic".

config MFD_RDC321X

	tristate "RDC R-321x southbridge"

	select MFD_CORE

obj-$(CONFIG_MFD_OMAP_USB_HOST)	+= omap-usb-host.o omap-usb-tll.o

obj-$(CONFIG_MFD_PM8921_CORE) 	+= pm8921-core.o ssbi.o

obj-$(CONFIG_MFD_SPMI_PMIC)	+= qcom-spmi-pmic.o

obj-$(CONFIG_MFD_I2C_PMIC)	+= qcom-i2c-pmic.o

obj-$(CONFIG_TPS65911_COMPARATOR)	+= tps65911-comparator.o

obj-$(CONFIG_MFD_TPS65090)	+= tps65090.o

obj-$(CONFIG_MFD_AAT2870_CORE)	+= aat2870-core.o