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Commit 872462cd authored by Sumit Semwal's avatar Sumit Semwal Committed by Tomi Valkeinen
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OMAP2PLUS: clocks: Align DSS clock names and roles 



Currently, clock database has <dev, clock-name> tuples for DSS2. Because of
this, the clock names are different across different OMAP platforms.

This patch aligns the DSS2 clock names and roles across OMAP 2420, 2430, 3xxx,
44xx platforms in the clock databases, hwmod databases for opt-clocks, and DSS
clock handling.

This ensures that clk_get/put/enable/disable APIs in DSS can use uniform role
names.

Signed-off-by: default avatarSumit Semwal <sumit.semwal@ti.com>
Acked-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
parent ef631f82

arch/arm/mach-omap2/clock2420_data.c

+3 −3
Original line number Diff line number Diff line
@@ -1787,9 +1787,9 @@ static struct omap_clk omap2420_clks[] = { 
	CLK(NULL,	"gfx_ick",	&gfx_ick,	CK_242X),

	/* DSS domain clocks */

	CLK("omapdss_dss",	"ick",		&dss_ick,	CK_242X),

	CLK("omapdss_dss",	"dss1_fck",	&dss1_fck,	CK_242X),

	CLK("omapdss_dss",	"dss2_fck",	&dss2_fck,	CK_242X),

	CLK("omapdss_dss",	"tv_fck",	&dss_54m_fck,	CK_242X),

	CLK("omapdss_dss",	"fck",		&dss1_fck,	CK_242X),

	CLK("omapdss_dss",	"sys_clk",	&dss2_fck,	CK_242X),

	CLK("omapdss_dss",	"tv_clk",	&dss_54m_fck,	CK_242X),

	/* L3 domain clocks */

	CLK(NULL,	"core_l3_ck",	&core_l3_ck,	CK_242X),

	CLK(NULL,	"ssi_fck",	&ssi_ssr_sst_fck, CK_242X),

arch/arm/mach-omap2/clock2430_data.c

+3 −3
Original line number Diff line number Diff line
@@ -1891,9 +1891,9 @@ static struct omap_clk omap2430_clks[] = { 
	CLK(NULL,	"mdm_osc_ck",	&mdm_osc_ck,	CK_243X),

	/* DSS domain clocks */

	CLK("omapdss_dss",	"ick",		&dss_ick,	CK_243X),

	CLK("omapdss_dss",	"dss1_fck",	&dss1_fck,	CK_243X),

	CLK("omapdss_dss",	"dss2_fck",	&dss2_fck,	CK_243X),

	CLK("omapdss_dss",	"tv_fck",	&dss_54m_fck,	CK_243X),

	CLK("omapdss_dss",	"fck",		&dss1_fck,	CK_243X),

	CLK("omapdss_dss",	"sys_clk",	&dss2_fck,	CK_243X),

	CLK("omapdss_dss",	"tv_clk",	&dss_54m_fck,	CK_243X),

	/* L3 domain clocks */

	CLK(NULL,	"core_l3_ck",	&core_l3_ck,	CK_243X),

	CLK(NULL,	"ssi_fck",	&ssi_ssr_sst_fck, CK_243X),

arch/arm/mach-omap2/clock3xxx_data.c

+5 −5
Original line number Diff line number Diff line
@@ -3357,11 +3357,11 @@ static struct omap_clk omap3xxx_clks[] = { 
	CLK("omap_rng",	"ick",		&rng_ick,	CK_34XX | CK_36XX),

	CLK(NULL,	"sha11_ick",	&sha11_ick,	CK_34XX | CK_36XX),

	CLK(NULL,	"des1_ick",	&des1_ick,	CK_34XX | CK_36XX),

	CLK("omapdss_dss",	"dss1_fck",	&dss1_alwon_fck_3430es1, CK_3430ES1),

	CLK("omapdss_dss",	"dss1_fck",	&dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),

	CLK("omapdss_dss",	"tv_fck",	&dss_tv_fck,	CK_3XXX),

	CLK("omapdss_dss",	"video_fck",	&dss_96m_fck,	CK_3XXX),

	CLK("omapdss_dss",	"dss2_fck",	&dss2_alwon_fck, CK_3XXX),

	CLK("omapdss_dss",	"fck",		&dss1_alwon_fck_3430es1, CK_3430ES1),

	CLK("omapdss_dss",	"fck",		&dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),

	CLK("omapdss_dss",	"tv_clk",	&dss_tv_fck,	CK_3XXX),

	CLK("omapdss_dss",	"video_clk",	&dss_96m_fck,	CK_3XXX),

	CLK("omapdss_dss",	"sys_clk",	&dss2_alwon_fck, CK_3XXX),

	CLK("omapdss_dss",	"ick",		&dss_ick_3430es1,	CK_3430ES1),

	CLK("omapdss_dss",	"ick",		&dss_ick_3430es2,	CK_3430ES2PLUS | CK_AM35XX | CK_36XX),

	CLK(NULL,	"cam_mclk",	&cam_mclk,	CK_34XX | CK_36XX),

arch/arm/mach-omap2/clock44xx_data.c

+5 −5
Original line number Diff line number Diff line
@@ -3106,11 +3106,11 @@ static struct omap_clk omap44xx_clks[] = { 
	CLK(NULL,	"dmic_sync_mux_ck",		&dmic_sync_mux_ck,	CK_443X),

	CLK(NULL,	"dmic_fck",			&dmic_fck,	CK_443X),

	CLK(NULL,	"dsp_fck",			&dsp_fck,	CK_443X),

	CLK(NULL,	"dss_sys_clk",			&dss_sys_clk,	CK_443X),

	CLK(NULL,	"dss_tv_clk",			&dss_tv_clk,	CK_443X),

	CLK(NULL,	"dss_dss_clk",			&dss_dss_clk,	CK_443X),

	CLK(NULL,	"dss_48mhz_clk",		&dss_48mhz_clk,	CK_443X),

	CLK(NULL,	"dss_fck",			&dss_fck,	CK_443X),

	CLK("omapdss_dss",	"sys_clk",			&dss_sys_clk,	CK_443X),

	CLK("omapdss_dss",	"tv_clk",			&dss_tv_clk,	CK_443X),

	CLK("omapdss_dss",	"dss_clk",			&dss_dss_clk,	CK_443X),

	CLK("omapdss_dss",	"video_clk",			&dss_48mhz_clk,	CK_443X),

	CLK("omapdss_dss",	"fck",				&dss_fck,	CK_443X),

	CLK(NULL,	"efuse_ctrl_cust_fck",		&efuse_ctrl_cust_fck,	CK_443X),

	CLK(NULL,	"emif1_fck",			&emif1_fck,	CK_443X),

	CLK(NULL,	"emif2_fck",			&emif2_fck,	CK_443X),

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

+1 −1
Original line number Diff line number Diff line
@@ -1571,7 +1571,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_slaves[] = { 


static struct omap_hwmod_opt_clk dss_opt_clks[] = {

	{ .role = "tv_clk", .clk = "dss_tv_fck" },

	{ .role = "dssclk", .clk = "dss_96m_fck" },

	{ .role = "video_clk", .clk = "dss_96m_fck" },

	{ .role = "sys_clk", .clk = "dss2_alwon_fck" },

};