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Commit 86fc187f authored by Ben Hutchings's avatar Ben Hutchings Committed by David S. Miller
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sfc: Remove unused definitions of EF10 user-mode DMA descriptors 



These DMA descriptor types will only be used by the userland
networking stack.

Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
Signed-off-by: default avatarShradha Shah <sshah@solarflare.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 0bdadad1

drivers/net/ethernet/sfc/ef10_regs.h

+0 −61
Original line number Diff line number Diff line
@@ -227,36 +227,6 @@ 
#define	ESF_DZ_RX_KER_BUF_ADDR_LBN 0

#define	ESF_DZ_RX_KER_BUF_ADDR_WIDTH 48



/* RX_USER_DESC */

#define	ESF_DZ_RX_USR_RESERVED_LBN 62

#define	ESF_DZ_RX_USR_RESERVED_WIDTH 2

#define	ESF_DZ_RX_USR_BYTE_CNT_LBN 48

#define	ESF_DZ_RX_USR_BYTE_CNT_WIDTH 14

#define	ESF_DZ_RX_USR_BUF_PAGE_SIZE_LBN 44

#define	ESF_DZ_RX_USR_BUF_PAGE_SIZE_WIDTH 4

#define	ESE_DZ_USR_BUF_PAGE_SZ_4MB 10

#define	ESE_DZ_USR_BUF_PAGE_SZ_1MB 8

#define	ESE_DZ_USR_BUF_PAGE_SZ_64KB 4

#define	ESE_DZ_USR_BUF_PAGE_SZ_4KB 0

#define	ESF_DZ_RX_USR_BUF_ID_OFFSET_LBN 0

#define	ESF_DZ_RX_USR_BUF_ID_OFFSET_WIDTH 44

#define	ESF_DZ_RX_USR_4KBPS_BUF_ID_LBN 12

#define	ESF_DZ_RX_USR_4KBPS_BUF_ID_WIDTH 32

#define	ESF_DZ_RX_USR_64KBPS_BUF_ID_LBN 16

#define	ESF_DZ_RX_USR_64KBPS_BUF_ID_WIDTH 28

#define	ESF_DZ_RX_USR_1MBPS_BUF_ID_LBN 20

#define	ESF_DZ_RX_USR_1MBPS_BUF_ID_WIDTH 24

#define	ESF_DZ_RX_USR_4MBPS_BUF_ID_LBN 22

#define	ESF_DZ_RX_USR_4MBPS_BUF_ID_WIDTH 22

#define	ESF_DZ_RX_USR_4MBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_RX_USR_4MBPS_BYTE_OFFSET_WIDTH 22

#define	ESF_DZ_RX_USR_1MBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_RX_USR_1MBPS_BYTE_OFFSET_WIDTH 20

#define	ESF_DZ_RX_USR_64KBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_RX_USR_64KBPS_BYTE_OFFSET_WIDTH 16

#define	ESF_DZ_RX_USR_4KBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_RX_USR_4KBPS_BYTE_OFFSET_WIDTH 12



/* TX_CSUM_TSTAMP_DESC */

#define	ESF_DZ_TX_DESC_IS_OPT_LBN 63

#define	ESF_DZ_TX_DESC_IS_OPT_WIDTH 1
@@ -338,37 +308,6 @@ 
#define	ESF_DZ_TX_TSO_TCP_SEQNO_LBN 0

#define	ESF_DZ_TX_TSO_TCP_SEQNO_WIDTH 32



/* TX_USER_DESC */

#define	ESF_DZ_TX_USR_TYPE_LBN 63

#define	ESF_DZ_TX_USR_TYPE_WIDTH 1

#define	ESF_DZ_TX_USR_CONT_LBN 62

#define	ESF_DZ_TX_USR_CONT_WIDTH 1

#define	ESF_DZ_TX_USR_BYTE_CNT_LBN 48

#define	ESF_DZ_TX_USR_BYTE_CNT_WIDTH 14

#define	ESF_DZ_TX_USR_BUF_PAGE_SIZE_LBN 44

#define	ESF_DZ_TX_USR_BUF_PAGE_SIZE_WIDTH 4

#define	ESE_DZ_USR_BUF_PAGE_SZ_4MB 10

#define	ESE_DZ_USR_BUF_PAGE_SZ_1MB 8

#define	ESE_DZ_USR_BUF_PAGE_SZ_64KB 4

#define	ESE_DZ_USR_BUF_PAGE_SZ_4KB 0

#define	ESF_DZ_TX_USR_BUF_ID_OFFSET_LBN 0

#define	ESF_DZ_TX_USR_BUF_ID_OFFSET_WIDTH 44

#define	ESF_DZ_TX_USR_4KBPS_BUF_ID_LBN 12

#define	ESF_DZ_TX_USR_4KBPS_BUF_ID_WIDTH 32

#define	ESF_DZ_TX_USR_64KBPS_BUF_ID_LBN 16

#define	ESF_DZ_TX_USR_64KBPS_BUF_ID_WIDTH 28

#define	ESF_DZ_TX_USR_1MBPS_BUF_ID_LBN 20

#define	ESF_DZ_TX_USR_1MBPS_BUF_ID_WIDTH 24

#define	ESF_DZ_TX_USR_4MBPS_BUF_ID_LBN 22

#define	ESF_DZ_TX_USR_4MBPS_BUF_ID_WIDTH 22

#define	ESF_DZ_TX_USR_4MBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_TX_USR_4MBPS_BYTE_OFFSET_WIDTH 22

#define	ESF_DZ_TX_USR_1MBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_TX_USR_1MBPS_BYTE_OFFSET_WIDTH 20

#define	ESF_DZ_TX_USR_64KBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_TX_USR_64KBPS_BYTE_OFFSET_WIDTH 16

#define	ESF_DZ_TX_USR_4KBPS_BYTE_OFFSET_LBN 0

#define	ESF_DZ_TX_USR_4KBPS_BYTE_OFFSET_WIDTH 12

/*************************************************************************/



/* TX_DESC_UPD_REG: Transmit descriptor update register.