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Commit 85dc74e9 authored by Tero Kristo's avatar Tero Kristo Committed by Mike Turquette
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ARM: dts: omap5 clock data



This patch creates a unique node for each clock in the OMAP5 power,
reset and clock manager (PRCM).

Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Acked-by: default avatarTony Lindgren <tony@atomide.com>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent 2488ff6c
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+54 −0
Original line number Diff line number Diff line
@@ -107,6 +107,58 @@
		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;

		prm: prm@4ae06000 {
			compatible = "ti,omap5-prm";
			reg = <0x4ae06000 0x3000>;

			prm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			prm_clockdomains: clockdomains {
			};
		};

		cm_core_aon: cm_core_aon@4a004000 {
			compatible = "ti,omap5-cm-core-aon";
			reg = <0x4a004000 0x2000>;

			cm_core_aon_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			cm_core_aon_clockdomains: clockdomains {
			};
		};

		scrm: scrm@4ae0a000 {
			compatible = "ti,omap5-scrm";
			reg = <0x4ae0a000 0x2000>;

			scrm_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			scrm_clockdomains: clockdomains {
			};
		};

		cm_core: cm_core@4a008000 {
			compatible = "ti,omap5-cm-core";
			reg = <0x4a008000 0x3000>;

			cm_core_clocks: clocks {
				#address-cells = <1>;
				#size-cells = <0>;
			};

			cm_core_clockdomains: clockdomains {
			};
		};

		counter32k: counter@4ae04000 {
			compatible = "ti,omap-counter32k";
			reg = <0x4ae04000 0x40>;
@@ -739,3 +791,5 @@
		};
	};
};

/include/ "omap54xx-clocks.dtsi"
+1399 −0

File added.

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