Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +13 −13 Original line number Diff line number Diff line Loading @@ -5131,16 +5131,16 @@ int ipa3_generate_eq_from_hw_rule( num_ihl_offset_meq_32 = attrib->num_ihl_offset_meq_32; num_offset_meq_128 = attrib->num_offset_meq_128; if (attrib->tos_eq_present) if (attrib->tos_eq_present && extra) attrib->tos_eq = *extra++; if (attrib->protocol_eq_present) if (attrib->protocol_eq_present && extra) attrib->protocol_eq = *extra++; if (attrib->tc_eq_present) if (attrib->tc_eq_present && extra) attrib->tc_eq = *extra++; if (num_offset_meq_128) { if (num_offset_meq_128 && extra) { attrib->offset_meq_128[0].offset = *extra++; for (i = 0; i < 8; i++) attrib->offset_meq_128[0].mask[i] = *rest++; Loading @@ -5153,7 +5153,7 @@ int ipa3_generate_eq_from_hw_rule( num_offset_meq_128--; } if (num_offset_meq_128) { if (num_offset_meq_128 && extra) { attrib->offset_meq_128[1].offset = *extra++; for (i = 0; i < 8; i++) attrib->offset_meq_128[1].mask[i] = *rest++; Loading @@ -5166,7 +5166,7 @@ int ipa3_generate_eq_from_hw_rule( num_offset_meq_128--; } if (num_offset_meq_32) { if (num_offset_meq_32 && extra) { attrib->offset_meq_32[0].offset = *extra++; attrib->offset_meq_32[0].mask = *((u32 *)rest); rest += 4; Loading @@ -5176,7 +5176,7 @@ int ipa3_generate_eq_from_hw_rule( } IPADBG("buf=0x%p extra=0x%p rest=0x%p\n", buf, extra, rest); if (num_offset_meq_32) { if (num_offset_meq_32 && extra) { attrib->offset_meq_32[1].offset = *extra++; attrib->offset_meq_32[1].mask = *((u32 *)rest); rest += 4; Loading @@ -5186,7 +5186,7 @@ int ipa3_generate_eq_from_hw_rule( } IPADBG("buf=0x%p extra=0x%p rest=0x%p\n", buf, extra, rest); if (num_ihl_offset_meq_32) { if (num_ihl_offset_meq_32 && extra) { attrib->ihl_offset_meq_32[0].offset = *extra++; attrib->ihl_offset_meq_32[0].mask = *((u32 *)rest); rest += 4; Loading @@ -5195,7 +5195,7 @@ int ipa3_generate_eq_from_hw_rule( num_ihl_offset_meq_32--; } if (num_ihl_offset_meq_32) { if (num_ihl_offset_meq_32 && extra) { attrib->ihl_offset_meq_32[1].offset = *extra++; attrib->ihl_offset_meq_32[1].mask = *((u32 *)rest); rest += 4; Loading @@ -5211,7 +5211,7 @@ int ipa3_generate_eq_from_hw_rule( rest += 4; } if (num_ihl_offset_range_16) { if (num_ihl_offset_range_16 && extra) { attrib->ihl_offset_range_16[0].offset = *extra++; attrib->ihl_offset_range_16[0].range_high = *((u16 *)rest); rest += 2; Loading @@ -5219,7 +5219,7 @@ int ipa3_generate_eq_from_hw_rule( rest += 2; num_ihl_offset_range_16--; } if (num_ihl_offset_range_16) { if (num_ihl_offset_range_16 && extra) { attrib->ihl_offset_range_16[1].offset = *extra++; attrib->ihl_offset_range_16[1].range_high = *((u16 *)rest); rest += 2; Loading @@ -5228,13 +5228,13 @@ int ipa3_generate_eq_from_hw_rule( num_ihl_offset_range_16--; } if (attrib->ihl_offset_eq_32_present) { if (attrib->ihl_offset_eq_32_present && extra) { attrib->ihl_offset_eq_32.offset = *extra++; attrib->ihl_offset_eq_32.value = *((u32 *)rest); rest += 4; } if (attrib->ihl_offset_eq_16_present) { if (attrib->ihl_offset_eq_16_present && extra) { attrib->ihl_offset_eq_16.offset = *extra++; attrib->ihl_offset_eq_16.value = *((u16 *)rest); rest += 4; Loading drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.c +16 −0 Original line number Diff line number Diff line Loading @@ -534,6 +534,11 @@ static int ipahal_imm_cmd_init(enum ipa_hw_type ipa_hw_type) IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); return -EINVAL; } memset(&zero_obj, 0, sizeof(zero_obj)); for (i = IPA_HW_v3_0 ; i < ipa_hw_type ; i++) { for (j = 0; j < IPA_IMM_CMD_MAX ; j++) { Loading Loading @@ -900,6 +905,11 @@ static int ipahal_pkt_status_init(enum ipa_hw_type ipa_hw_type) IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); return -EINVAL; } /* * Since structure alignment is implementation dependent, * add test to avoid different and incompatible data layouts. Loading Loading @@ -1263,6 +1273,12 @@ int ipahal_init(enum ipa_hw_type ipa_hw_type, void __iomem *base) goto bail_free_ctx; } if (ipa_hw_type >= IPA_HW_MAX) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); result = -EINVAL; goto bail_free_ctx; } if (!base) { IPAHAL_ERR("invalid memory io mapping addr\n"); result = -EINVAL; Loading drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c +5 −0 Original line number Diff line number Diff line Loading @@ -1066,6 +1066,11 @@ int ipahal_reg_init(enum ipa_hw_type ipa_hw_type) IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); return -EINVAL; } memset(&zero_obj, 0, sizeof(zero_obj)); for (i = IPA_HW_v3_0 ; i < ipa_hw_type ; i++) { for (j = 0; j < IPA_REG_MAX ; j++) { Loading Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +13 −13 Original line number Diff line number Diff line Loading @@ -5131,16 +5131,16 @@ int ipa3_generate_eq_from_hw_rule( num_ihl_offset_meq_32 = attrib->num_ihl_offset_meq_32; num_offset_meq_128 = attrib->num_offset_meq_128; if (attrib->tos_eq_present) if (attrib->tos_eq_present && extra) attrib->tos_eq = *extra++; if (attrib->protocol_eq_present) if (attrib->protocol_eq_present && extra) attrib->protocol_eq = *extra++; if (attrib->tc_eq_present) if (attrib->tc_eq_present && extra) attrib->tc_eq = *extra++; if (num_offset_meq_128) { if (num_offset_meq_128 && extra) { attrib->offset_meq_128[0].offset = *extra++; for (i = 0; i < 8; i++) attrib->offset_meq_128[0].mask[i] = *rest++; Loading @@ -5153,7 +5153,7 @@ int ipa3_generate_eq_from_hw_rule( num_offset_meq_128--; } if (num_offset_meq_128) { if (num_offset_meq_128 && extra) { attrib->offset_meq_128[1].offset = *extra++; for (i = 0; i < 8; i++) attrib->offset_meq_128[1].mask[i] = *rest++; Loading @@ -5166,7 +5166,7 @@ int ipa3_generate_eq_from_hw_rule( num_offset_meq_128--; } if (num_offset_meq_32) { if (num_offset_meq_32 && extra) { attrib->offset_meq_32[0].offset = *extra++; attrib->offset_meq_32[0].mask = *((u32 *)rest); rest += 4; Loading @@ -5176,7 +5176,7 @@ int ipa3_generate_eq_from_hw_rule( } IPADBG("buf=0x%p extra=0x%p rest=0x%p\n", buf, extra, rest); if (num_offset_meq_32) { if (num_offset_meq_32 && extra) { attrib->offset_meq_32[1].offset = *extra++; attrib->offset_meq_32[1].mask = *((u32 *)rest); rest += 4; Loading @@ -5186,7 +5186,7 @@ int ipa3_generate_eq_from_hw_rule( } IPADBG("buf=0x%p extra=0x%p rest=0x%p\n", buf, extra, rest); if (num_ihl_offset_meq_32) { if (num_ihl_offset_meq_32 && extra) { attrib->ihl_offset_meq_32[0].offset = *extra++; attrib->ihl_offset_meq_32[0].mask = *((u32 *)rest); rest += 4; Loading @@ -5195,7 +5195,7 @@ int ipa3_generate_eq_from_hw_rule( num_ihl_offset_meq_32--; } if (num_ihl_offset_meq_32) { if (num_ihl_offset_meq_32 && extra) { attrib->ihl_offset_meq_32[1].offset = *extra++; attrib->ihl_offset_meq_32[1].mask = *((u32 *)rest); rest += 4; Loading @@ -5211,7 +5211,7 @@ int ipa3_generate_eq_from_hw_rule( rest += 4; } if (num_ihl_offset_range_16) { if (num_ihl_offset_range_16 && extra) { attrib->ihl_offset_range_16[0].offset = *extra++; attrib->ihl_offset_range_16[0].range_high = *((u16 *)rest); rest += 2; Loading @@ -5219,7 +5219,7 @@ int ipa3_generate_eq_from_hw_rule( rest += 2; num_ihl_offset_range_16--; } if (num_ihl_offset_range_16) { if (num_ihl_offset_range_16 && extra) { attrib->ihl_offset_range_16[1].offset = *extra++; attrib->ihl_offset_range_16[1].range_high = *((u16 *)rest); rest += 2; Loading @@ -5228,13 +5228,13 @@ int ipa3_generate_eq_from_hw_rule( num_ihl_offset_range_16--; } if (attrib->ihl_offset_eq_32_present) { if (attrib->ihl_offset_eq_32_present && extra) { attrib->ihl_offset_eq_32.offset = *extra++; attrib->ihl_offset_eq_32.value = *((u32 *)rest); rest += 4; } if (attrib->ihl_offset_eq_16_present) { if (attrib->ihl_offset_eq_16_present && extra) { attrib->ihl_offset_eq_16.offset = *extra++; attrib->ihl_offset_eq_16.value = *((u16 *)rest); rest += 4; Loading
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal.c +16 −0 Original line number Diff line number Diff line Loading @@ -534,6 +534,11 @@ static int ipahal_imm_cmd_init(enum ipa_hw_type ipa_hw_type) IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); return -EINVAL; } memset(&zero_obj, 0, sizeof(zero_obj)); for (i = IPA_HW_v3_0 ; i < ipa_hw_type ; i++) { for (j = 0; j < IPA_IMM_CMD_MAX ; j++) { Loading Loading @@ -900,6 +905,11 @@ static int ipahal_pkt_status_init(enum ipa_hw_type ipa_hw_type) IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); return -EINVAL; } /* * Since structure alignment is implementation dependent, * add test to avoid different and incompatible data layouts. Loading Loading @@ -1263,6 +1273,12 @@ int ipahal_init(enum ipa_hw_type ipa_hw_type, void __iomem *base) goto bail_free_ctx; } if (ipa_hw_type >= IPA_HW_MAX) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); result = -EINVAL; goto bail_free_ctx; } if (!base) { IPAHAL_ERR("invalid memory io mapping addr\n"); result = -EINVAL; Loading
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_reg.c +5 −0 Original line number Diff line number Diff line Loading @@ -1066,6 +1066,11 @@ int ipahal_reg_init(enum ipa_hw_type ipa_hw_type) IPAHAL_DBG_LOW("Entry - HW_TYPE=%d\n", ipa_hw_type); if ((ipa_hw_type < 0) || (ipa_hw_type >= IPA_HW_MAX)) { IPAHAL_ERR("invalid IPA HW type (%d)\n", ipa_hw_type); return -EINVAL; } memset(&zero_obj, 0, sizeof(zero_obj)); for (i = IPA_HW_v3_0 ; i < ipa_hw_type ; i++) { for (j = 0; j < IPA_REG_MAX ; j++) { Loading