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Commit 857aea1c authored by Charmaine Lee's avatar Charmaine Lee Committed by Thomas Hellstrom
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drm/vmwgfx: Get maximum mob size from register SVGA_REG_MOB_MAX_SIZE 



This patch queries the register SVGA_REG_MOB_MAX_SIZE for the
maximum size of a single mob.

Signed-off-by: default avatarCharmaine Lee <charmainel@vmware.com>
Reviewed-by: default avatarThomas Hellstrom <thellstrom@vmware.com>
parent 8e67bbbc

drivers/gpu/drm/vmwgfx/svga_reg.h

+8 −1
Original line number Diff line number Diff line
@@ -169,10 +169,17 @@ enum { 
   SVGA_REG_TRACES = 45,            /* Enable trace-based updates even when FIFO is on */

   SVGA_REG_GMRS_MAX_PAGES = 46,    /* Maximum number of 4KB pages for all GMRs */

   SVGA_REG_MEMORY_SIZE = 47,       /* Total dedicated device memory excluding FIFO */

   SVGA_REG_COMMAND_LOW = 48,       /* Lower 32 bits and submits commands */

   SVGA_REG_COMMAND_HIGH = 49,      /* Upper 32 bits of command buffer PA */

   SVGA_REG_MAX_PRIMARY_BOUNDING_BOX_MEM = 50,   /* Max primary memory */

   SVGA_REG_SUGGESTED_GBOBJECT_MEM_SIZE_KB = 51, /* Suggested limit on mob mem */

   SVGA_REG_DEV_CAP = 52,           /* Write dev cap index, read value */

   SVGA_REG_TOP = 53,               /* Must be 1 more than the last register */

   SVGA_REG_CMD_PREPEND_LOW = 53,

   SVGA_REG_CMD_PREPEND_HIGH = 54,

   SVGA_REG_SCREENTARGET_MAX_WIDTH = 55,

   SVGA_REG_SCREENTARGET_MAX_HEIGHT = 56,

   SVGA_REG_MOB_MAX_SIZE = 57,

   SVGA_REG_TOP = 58,               /* Must be 1 more than the last register */



   SVGA_PALETTE_BASE = 1024,        /* Base of SVGA color map */

   /* Next 768 (== 256*3) registers exist for colormap */

drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

+3 −0
Original line number Diff line number Diff line
@@ -667,6 +667,7 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) 
		dev_priv->memory_size = 512*1024*1024;

	}

	dev_priv->max_mob_pages = 0;

	dev_priv->max_mob_size = 0;

	if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {

		uint64_t mem_size =

			vmw_read(dev_priv,
@@ -676,6 +677,8 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset) 
		dev_priv->prim_bb_mem =

			vmw_read(dev_priv,

				 SVGA_REG_MAX_PRIMARY_BOUNDING_BOX_MEM);

		dev_priv->max_mob_size =

			vmw_read(dev_priv, SVGA_REG_MOB_MAX_SIZE);

	} else

		dev_priv->prim_bb_mem = dev_priv->vram_size;

drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -386,6 +386,7 @@ struct vmw_private { 
	uint32_t max_gmr_ids;

	uint32_t max_gmr_pages;

	uint32_t max_mob_pages;

	uint32_t max_mob_size;

	uint32_t memory_size;

	bool has_gmr;

	bool has_mob;

drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c

+3 −0
Original line number Diff line number Diff line
@@ -102,6 +102,9 @@ int vmw_getparam_ioctl(struct drm_device *dev, void *data, 
		vmw_fp->gb_aware = true;

		param->value = dev_priv->max_mob_pages * PAGE_SIZE;

		break;

	case DRM_VMW_PARAM_MAX_MOB_SIZE:

		param->value = dev_priv->max_mob_size;

		break;

	default:

		DRM_ERROR("Illegal vmwgfx get param request: %d\n",

			  param->param);

include/uapi/drm/vmwgfx_drm.h

+1 −0
Original line number Diff line number Diff line
@@ -87,6 +87,7 @@ 
#define DRM_VMW_PARAM_MAX_SURF_MEMORY  7

#define DRM_VMW_PARAM_3D_CAPS_SIZE     8

#define DRM_VMW_PARAM_MAX_MOB_MEMORY   9

#define DRM_VMW_PARAM_MAX_MOB_SIZE     10



/**

 * struct drm_vmw_getparam_arg