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Commit 84a1beac authored by Shaoqing Liu's avatar Shaoqing Liu Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add coresight byte counter interrupt for mdmfermium 



Add device tree entry to support CoreSight byte counter interrupt
feature which raises an interrupt on transfer of programmed
number of bytes to ETR-memory.

Change-Id: Ifd4091e55a742103033a4a90b8712d9b055fb64e
Signed-off-by: default avatarShaoqing Liu <shaoqingliu@codeaurora.org>
Signed-off-by: default avatarXiaogang Cui <xiaogang@codeaurora.org>
parent ff4e6160

arch/arm/boot/dts/qcom/mdmfermium-coresight.dtsi

+2 −0
Original line number Original line Diff line number Diff line
@@ -16,6 +16,8 @@ 
		compatible = "arm,coresight-tmc";

		compatible = "arm,coresight-tmc";

		reg = <0x6026000 0x1000>;

		reg = <0x6026000 0x1000>;

		reg-names = "tmc-base";

		reg-names = "tmc-base";

		interrupts = <0 166 0>;

		interrupt-names = "byte-cntr-irq";





		qcom,memory-size = <0x100000>;

		qcom,memory-size = <0x100000>;