Loading arch/arm/boot/dts/qcom/mdmfermium-smp2p.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -80,4 +80,25 @@ compatible = "qcom,smp2pgpio_test_smp2p_1_out"; gpios = <&smp2pgpio_smp2p_1_out 0 0>; }; smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <1>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <1>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; }; arch/arm/boot/dts/qcom/mdmfermium.dtsi +43 −0 Original line number Diff line number Diff line Loading @@ -566,6 +566,49 @@ status = "disabled"; }; qcom,mss@4080000 { compatible = "qcom,pil-q6v55-mss"; reg = <0x04080000 0x100>, <0x0194f000 0x010>, <0x01950000 0x008>, <0x01951000 0x008>, <0x04020000 0x040>, <0x0183e000 0x004>; reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc", "rmb_base", "restart_reg"; interrupts = <0 24 1>; vdd_cx-supply = <&mdmfermium_s3_level>; vdd_cx-voltage = <RPM_SMD_REGULATOR_LEVEL_TURBO>; vdd_mx-supply = <&mdmfermium_l12_level>; vdd_mx-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>; vdd_pll-supply = <&mdmfermium_l3>; qcom,vdd_pll = <1800000>; clocks = <&clock_gcc clk_xo_pil_mss_clk>, <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, <&clock_gcc clk_gcc_boot_rom_ahb_clk>; clock-names = "xo", "iface_clk", "bus_clk", "mem_clk"; qcom,proxy-clock-names = "xo"; qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk"; qcom,firmware-name = "modem"; qcom,pil-self-auth; qcom,sysmon-id = <0>; qcom,ssctl-instance-id = <0x12>; qcom,qdsp6v56-1-8-inrush-current; /* GPIO inputs from mss */ qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; /* GPIO output to mss */ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; memory-region = <&modem_adsp_mem>; }; }; #include "mdmfermium-regulator.dtsi" Loading Loading
arch/arm/boot/dts/qcom/mdmfermium-smp2p.dtsi +21 −0 Original line number Diff line number Diff line Loading @@ -80,4 +80,25 @@ compatible = "qcom,smp2pgpio_test_smp2p_1_out"; gpios = <&smp2pgpio_smp2p_1_out 0 0>; }; smp2pgpio_ssr_smp2p_1_in: qcom,smp2pgpio-ssr-smp2p-1-in { compatible = "qcom,smp2pgpio"; qcom,entry-name = "slave-kernel"; qcom,remote-pid = <1>; qcom,is-inbound; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; smp2pgpio_ssr_smp2p_1_out: qcom,smp2pgpio-ssr-smp2p-1-out { compatible = "qcom,smp2pgpio"; qcom,entry-name = "master-kernel"; qcom,remote-pid = <1>; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; }; };
arch/arm/boot/dts/qcom/mdmfermium.dtsi +43 −0 Original line number Diff line number Diff line Loading @@ -566,6 +566,49 @@ status = "disabled"; }; qcom,mss@4080000 { compatible = "qcom,pil-q6v55-mss"; reg = <0x04080000 0x100>, <0x0194f000 0x010>, <0x01950000 0x008>, <0x01951000 0x008>, <0x04020000 0x040>, <0x0183e000 0x004>; reg-names = "qdsp6_base", "halt_q6", "halt_modem", "halt_nc", "rmb_base", "restart_reg"; interrupts = <0 24 1>; vdd_cx-supply = <&mdmfermium_s3_level>; vdd_cx-voltage = <RPM_SMD_REGULATOR_LEVEL_TURBO>; vdd_mx-supply = <&mdmfermium_l12_level>; vdd_mx-uV = <RPM_SMD_REGULATOR_LEVEL_TURBO>; vdd_pll-supply = <&mdmfermium_l3>; qcom,vdd_pll = <1800000>; clocks = <&clock_gcc clk_xo_pil_mss_clk>, <&clock_gcc clk_gcc_mss_cfg_ahb_clk>, <&clock_gcc clk_gcc_mss_q6_bimc_axi_clk>, <&clock_gcc clk_gcc_boot_rom_ahb_clk>; clock-names = "xo", "iface_clk", "bus_clk", "mem_clk"; qcom,proxy-clock-names = "xo"; qcom,active-clock-names = "iface_clk", "bus_clk", "mem_clk"; qcom,firmware-name = "modem"; qcom,pil-self-auth; qcom,sysmon-id = <0>; qcom,ssctl-instance-id = <0x12>; qcom,qdsp6v56-1-8-inrush-current; /* GPIO inputs from mss */ qcom,gpio-err-fatal = <&smp2pgpio_ssr_smp2p_1_in 0 0>; qcom,gpio-err-ready = <&smp2pgpio_ssr_smp2p_1_in 1 0>; qcom,gpio-proxy-unvote = <&smp2pgpio_ssr_smp2p_1_in 2 0>; qcom,gpio-stop-ack = <&smp2pgpio_ssr_smp2p_1_in 3 0>; /* GPIO output to mss */ qcom,gpio-force-stop = <&smp2pgpio_ssr_smp2p_1_out 0 0>; memory-region = <&modem_adsp_mem>; }; }; #include "mdmfermium-regulator.dtsi" Loading