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Commit 841b2cca authored by Stanislaw Gruszka's avatar Stanislaw Gruszka
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iwlegacy: rename il_{read,write}32 to _il_{rd,wr}



Introduce rule that underscore at the beginning mean unlocked I/O method.

Signed-off-by: default avatarStanislaw Gruszka <sgruszka@redhat.com>
parent b6297cd2
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+2 −2
Original line number Diff line number Diff line
@@ -1058,7 +1058,7 @@ static inline int il3945_hw_reg_temp_out_of_range(int temperature)

int il3945_hw_get_temperature(struct il_priv *il)
{
	return il_read32(il, CSR_UCODE_DRV_GP2);
	return _il_rd(il, CSR_UCODE_DRV_GP2);
}

/**
@@ -2211,7 +2211,7 @@ int il3945_hw_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq)
		FH39_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);

	/* fake read to flush all prev. writes */
	il_read32(il, FH39_TSSR_CBB_BASE);
	_il_rd(il, FH39_TSSR_CBB_BASE);

	return 0;
}
+3 −3
Original line number Diff line number Diff line
@@ -55,9 +55,9 @@ il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
	};
	u32 reg;

	reg = il_read32(il, CSR_LED_REG);
	reg = _il_rd(il, CSR_LED_REG);
	if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
		il_write32(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
		_il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);

	return il_send_cmd(il, &cmd);
}
@@ -65,7 +65,7 @@ il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
/* Set led register off */
void il4965_led_enable(struct il_priv *il)
{
	il_write32(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
	_il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
}

const struct il_led_ops il4965_led_ops = {
+5 −5
Original line number Diff line number Diff line
@@ -2001,7 +2001,7 @@ int il_pci_resume(struct device *device)

	il_enable_interrupts(il);

	if (!(il_read32(il, CSR_GP_CNTRL) &
	if (!(_il_rd(il, CSR_GP_CNTRL) &
				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
		hw_rfkill = true;

@@ -2580,12 +2580,12 @@ irqreturn_t il_isr(int irq, void *data)
	 *    back-to-back ISRs and sporadic interrupts from our NIC.
	 * If we have something to service, the tasklet will re-enable ints.
	 * If we *don't* have something, we'll re-enable before leaving here. */
	inta_mask = il_read32(il, CSR_INT_MASK);  /* just for debug */
	il_write32(il, CSR_INT_MASK, 0x00000000);
	inta_mask = _il_rd(il, CSR_INT_MASK);  /* just for debug */
	_il_wr(il, CSR_INT_MASK, 0x00000000);

	/* Discover which interrupts are active/pending */
	inta = il_read32(il, CSR_INT);
	inta_fh = il_read32(il, CSR_FH_INT_STATUS);
	inta = _il_rd(il, CSR_INT);
	inta_fh = _il_rd(il, CSR_FH_INT_STATUS);

	/* Ignore interrupt if there's nothing in NIC to service.
	 * This may be due to IRQ shared with another device,
+3 −3
Original line number Diff line number Diff line
@@ -70,7 +70,7 @@
 * low power states due to driver-invoked device resets
 * (e.g. CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
 *
 * Use il_write32() and il_read32() family to access these registers;
 * Use _il_wr() and _il_rd() family to access these registers;
 * these provide simple PCI bus access, without waking up the MAC.
 * Do not use il_write_direct32() family for these registers;
 * no need to "grab nic access" via CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ.
@@ -91,7 +91,7 @@
#define CSR_RESET               (CSR_BASE+0x020) /* busmaster enable, NMI, etc*/
#define CSR_GP_CNTRL            (CSR_BASE+0x024)

/* 2nd byte of CSR_INT_COALESCING, not accessible via il_write32()! */
/* 2nd byte of CSR_INT_COALESCING, not accessible via _il_wr()! */
#define CSR_INT_PERIODIC_REG	(CSR_BASE+0x005)

/*
@@ -374,7 +374,7 @@
 * to make sure the MAC (uCode processor, etc.) is powered up for accessing
 * internal resources.
 *
 * Do not use il_write32()/il_read32() family to access these registers;
 * Do not use _il_wr()/_il_rd() family to access these registers;
 * these provide only simple PCI bus access, without waking up the MAC.
 */
#define HBUS_BASE	(0x400)
+1 −1
Original line number Diff line number Diff line
@@ -1018,7 +1018,7 @@ static ssize_t il_dbgfs_power_save_status_read(struct file *file,
	const size_t bufsz = sizeof(buf);
	u32 pwrsave_status;

	pwrsave_status = il_read32(il, CSR_GP_CNTRL) &
	pwrsave_status = _il_rd(il, CSR_GP_CNTRL) &
			CSR_GP_REG_POWER_SAVE_STATUS_MSK;

	pos += scnprintf(buf + pos, bufsz - pos, "Power Save Status: ");
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