Merge branches 'amd-iommu/fixes', 'amd-iommu/debug',... (83cce2b6) · Commits · e / devices / android_kernel_xiaomi_markw

Documentation/kernel-parameters.txt

+0 −5

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		@@ -329,11 +329,6 @@ and is between 256 and 4096 characters. It is defined in the file
		flushed before they will be reused, which
		is a lot of faster

		amd_iommu_size= [HW,X86-64]
		Define the size of the aperture for the AMD IOMMU
		driver. Possible values are:
		'32M', '64M' (default), '128M', '256M', '512M', '1G'

		amijoy.map= [HW,JOY] Amiga joystick support
		Map of devices attached to JOY0DAT and JOY1DAT
		Format: <a>,<b>

arch/x86/Kconfig.debug

+8 −0

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		@@ -159,6 +159,14 @@ config IOMMU_DEBUG
		options. See Documentation/x86_64/boot-options.txt for more
		details.

		config IOMMU_STRESS
		bool "Enable IOMMU stress-test mode"
		---help---
		This option disables various optimizations in IOMMU related
		code to do real stress testing of the IOMMU code. This option
		will cause a performance drop and should only be enabled for
		testing.

		config IOMMU_LEAK
		bool "IOMMU leak tracing"
		depends on IOMMU_DEBUG && DMA_API_DEBUG

arch/x86/include/asm/amd_iommu.h

+2 −0

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		@@ -27,6 +27,8 @@ extern int amd_iommu_init(void);
		extern int amd_iommu_init_dma_ops(void);
		extern void amd_iommu_detect(void);
		extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
		extern void amd_iommu_flush_all_domains(void);
		extern void amd_iommu_flush_all_devices(void);
		#else
		static inline int amd_iommu_init(void) { return -ENODEV; }
		static inline void amd_iommu_detect(void) { }

arch/x86/include/asm/amd_iommu_types.h

+44 −11

Original line number	Diff line number	Diff line
		@@ -194,6 +194,27 @@
		#define PD_DMA_OPS_MASK (1UL << 0) /* domain used for dma_ops */
		#define PD_DEFAULT_MASK (1UL << 1) /* domain is a default dma_ops
		domain for an IOMMU */
		extern bool amd_iommu_dump;
		#define DUMP_printk(format, arg...) \
		do { \
		if (amd_iommu_dump) \
		printk(KERN_INFO "AMD IOMMU: " format, ## arg); \
		} while(0);

		/*
		* Make iterating over all IOMMUs easier
		*/
		#define for_each_iommu(iommu) \
		list_for_each_entry((iommu), &amd_iommu_list, list)
		#define for_each_iommu_safe(iommu, next) \
		list_for_each_entry_safe((iommu), (next), &amd_iommu_list, list)

		#define APERTURE_RANGE_SHIFT 27 /* 128 MB */
		#define APERTURE_RANGE_SIZE (1ULL << APERTURE_RANGE_SHIFT)
		#define APERTURE_RANGE_PAGES (APERTURE_RANGE_SIZE >> PAGE_SHIFT)
		#define APERTURE_MAX_RANGES 32 /* allows 4GB of DMA address space */
		#define APERTURE_RANGE_INDEX(a) ((a) >> APERTURE_RANGE_SHIFT)
		#define APERTURE_PAGE_INDEX(a) (((a) >> 21) & 0x3fULL)

		/*
		* This structure contains generic data for IOMMU protection domains
		@@ -209,6 +230,26 @@ struct protection_domain {
		void priv; / private data */
		};

		/*
		* For dynamic growth the aperture size is split into ranges of 128MB of
		* DMA address space each. This struct represents one such range.
		*/
		struct aperture_range {

		/* address allocation bitmap */
		unsigned long *bitmap;

		/*
		* Array of PTE pages for the aperture. In this array we save all the
		* leaf pages of the domain page table used for the aperture. This way
		* we don't need to walk the page table to find a specific PTE. We can
		* just calculate its address in constant time.
		*/
		u64 *pte_pages[64];

		unsigned long offset;
		};

		/*
		* Data container for a dma_ops specific protection domain
		*/
		@@ -222,18 +263,10 @@ struct dma_ops_domain {
		unsigned long aperture_size;

		/* address we start to search for free addresses */
		unsigned long next_bit;

		/* address allocation bitmap */
		unsigned long *bitmap;
		unsigned long next_address;

		/*
		* Array of PTE pages for the aperture. In this array we save all the
		* leaf pages of the domain page table used for the aperture. This way
		* we don't need to walk the page table to find a specific PTE. We can
		* just calculate its address in constant time.
		*/
		u64 **pte_pages;
		/* address space relevant data */
		struct aperture_range *aperture[APERTURE_MAX_RANGES];

		/* This will be set to true when TLB needs to be flushed */
		bool need_flush;

arch/x86/kernel/amd_iommu.c

+361 −125

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