drm/nva3/copy: use nouveau_falcon base class (8365f2fd) · Commits · e / devices / android_kernel_xiaomi_markw

drivers/gpu/drm/nouveau/core/engine/copy/nva3.c

+22 −59

Original line number	Diff line number	Diff line
		@@ -22,10 +22,9 @@
		* Authors: Ben Skeggs
		*/

		#include <core/os.h>
		#include <core/enum.h>
		#include <core/falcon.h>
		#include <core/class.h>
		#include <core/engctx.h>
		#include <core/enum.h>

		#include <subdev/fb.h>
		#include <subdev/vm.h>
		@@ -36,11 +35,11 @@
		#include "fuc/nva3.fuc.h"

		struct nva3_copy_priv {
		struct nouveau_copy base;
		struct nouveau_falcon base;
		};

		struct nva3_copy_chan {
		struct nouveau_copy_chan base;
		struct nouveau_falcon_chan base;
		};

		/*******************************************************************************
		@@ -66,8 +65,8 @@ nva3_copy_context_ctor(struct nouveau_object *parent,
		struct nva3_copy_chan *priv;
		int ret;

		ret = nouveau_copy_context_create(parent, engine, oclass, NULL, 256, 0,
		NVOBJ_FLAG_ZERO_ALLOC, &priv);
		ret = nouveau_falcon_context_create(parent, engine, oclass, NULL, 256,
		0, NVOBJ_FLAG_ZERO_ALLOC, &priv);
		*pobject = nv_object(priv);
		if (ret)
		return ret;
		@@ -80,11 +79,11 @@ nva3_copy_cclass = {
		.handle = NV_ENGCTX(COPY0, 0xa3),
		.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nva3_copy_context_ctor,
		.dtor = _nouveau_copy_context_dtor,
		.init = _nouveau_copy_context_init,
		.fini = _nouveau_copy_context_fini,
		.rd32 = _nouveau_copy_context_rd32,
		.wr32 = _nouveau_copy_context_wr32,
		.dtor = _nouveau_falcon_context_dtor,
		.init = _nouveau_falcon_context_init,
		.fini = _nouveau_falcon_context_fini,
		.rd32 = _nouveau_falcon_context_rd32,
		.wr32 = _nouveau_falcon_context_wr32,

		},
		};
		@@ -154,7 +153,8 @@ nva3_copy_ctor(struct nouveau_object parent, struct nouveau_object engine,
		struct nva3_copy_priv *priv;
		int ret;

		ret = nouveau_copy_create(parent, engine, oclass, enable, 0, &priv);
		ret = nouveau_falcon_create(parent, engine, oclass, 0x104000, enable,
		"PCE0", "copy0", &priv);
		*pobject = nv_object(priv);
		if (ret)
		return ret;
		@@ -164,59 +164,22 @@ nva3_copy_ctor(struct nouveau_object parent, struct nouveau_object engine,
		nv_engine(priv)->cclass = &nva3_copy_cclass;
		nv_engine(priv)->sclass = nva3_copy_sclass;
		nv_engine(priv)->tlb_flush = nva3_copy_tlb_flush;
		nv_falcon(priv)->code.data = nva3_pcopy_code;
		nv_falcon(priv)->code.size = sizeof(nva3_pcopy_code);
		nv_falcon(priv)->data.data = nva3_pcopy_data;
		nv_falcon(priv)->data.size = sizeof(nva3_pcopy_data);
		return 0;
		}

		static int
		nva3_copy_init(struct nouveau_object *object)
		{
		struct nva3_copy_priv priv = (void )object;
		int ret, i;

		ret = nouveau_copy_init(&priv->base);
		if (ret)
		return ret;

		/* disable all interrupts */
		nv_wr32(priv, 0x104014, 0xffffffff);

		/* upload ucode */
		nv_wr32(priv, 0x1041c0, 0x01000000);
		for (i = 0; i < sizeof(nva3_pcopy_data) / 4; i++)
		nv_wr32(priv, 0x1041c4, nva3_pcopy_data[i]);

		nv_wr32(priv, 0x104180, 0x01000000);
		for (i = 0; i < sizeof(nva3_pcopy_code) / 4; i++) {
		if ((i & 0x3f) == 0)
		nv_wr32(priv, 0x104188, i >> 6);
		nv_wr32(priv, 0x104184, nva3_pcopy_code[i]);
		}

		/* start it running */
		nv_wr32(priv, 0x10410c, 0x00000000);
		nv_wr32(priv, 0x104104, 0x00000000); /* ENTRY */
		nv_wr32(priv, 0x104100, 0x00000002); /* TRIGGER */
		return 0;
		}

		static int
		nva3_copy_fini(struct nouveau_object *object, bool suspend)
		{
		struct nva3_copy_priv priv = (void )object;

		nv_mask(priv, 0x104048, 0x00000003, 0x00000000);
		nv_wr32(priv, 0x104014, 0xffffffff);

		return nouveau_copy_fini(&priv->base, suspend);
		}

		struct nouveau_oclass
		nva3_copy_oclass = {
		.handle = NV_ENGINE(COPY0, 0xa3),
		.ofuncs = &(struct nouveau_ofuncs) {
		.ctor = nva3_copy_ctor,
		.dtor = _nouveau_copy_dtor,
		.init = nva3_copy_init,
		.fini = nva3_copy_fini,
		.dtor = _nouveau_falcon_dtor,
		.init = _nouveau_falcon_init,
		.fini = _nouveau_falcon_fini,
		.rd32 = _nouveau_falcon_rd32,
		.wr32 = _nouveau_falcon_wr32,
		},
		};